• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      JCTEYSSIER0
      JCTEYSSIER0 70 Points
    • 2
      Hoangkhoipcb
      Hoangkhoipcb 30 Points
    • 2
      zpofrp
      zpofrp 30 Points
    • 4
      Jocko
      Jocko 20 Points
    • 4
      leetzeyin59
      leetzeyin59 20 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,658 Points
    • 2
      oldmouldy
      oldmouldy 10,905 Points
    • 3
      eDave
      eDave 7,471 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,236 Points
    • 5
      redwire
      redwire 4,828 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Answered

    how to make "END MODE PIN" appear on my Schematics?

    Category: Allegro X Capture CIS

    By Firmus5

    •

    updated over 4 years ago by Firmus5

    4 replies • 2793 views
  • Answered

    Blind via on footprint design

    Category: Allegro X APD

    By alexspin

    •

    updated over 4 years ago by alexspin

    2 replies • 14218 views
  • Discussion

    Allegro - Tip of the Week: Customizing Blind/Buried Via Labels

    Category: Allegro X PCB Editor

    By PCBTech

    •

    started over 4 years ago

    0 replies • 1439 views
  • Not Answered

    OrCAD CIS BOM text length limit

    Category: Allegro X Capture CIS

    By SRoger

    •

    updated over 4 years ago by oldmouldy

    3 replies • 10590 views
  • Discussion

    Smart PDF for design review

    Category: Allegro X Capture CIS

    By DesignTech

    •

    updated over 4 years ago by oldmouldy

    2 replies • 9771 views
  • Discussion

    What is PCB Panelization, and why is it important?

    Category: Allegro X PCB Editor

    By PCBTech

    •

    started over 4 years ago

    0 replies • 9276 views
  • Discussion

    PSpice - Tip of the Week: Want to compare different waveforms? Use the Append Waveform feature.

    Category: PSpice

    By DesignTech

    •

    started over 4 years ago

    0 replies • 1681 views
  • Suggested Answer

    design outline edit

    Category: Allegro X PCB Editor

    By myil17

    •

    updated over 4 years ago by JuanCR

    4 replies • 12232 views
  • Not Answered

    Schedule changes to runtime parameters in PSpice

    Category: PSpice

    By DesignTech

    •

    started over 4 years ago

    0 replies • 8477 views
  • Not Answered

    Opening DSN file issue

    Category: Allegro X Capture CIS

    By chumeck

    •

    updated over 4 years ago by rg13

    3 replies • 11553 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information