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Discussion

Can't delete duplicate properties Locked

473 views

0 replies

Started over 6 years ago
by GABrown
Discussion

Differences between a netclass and a netgroup Locked

14838 views

1 reply

Latest over 6 years ago
by Robert Finley
Discussion

Testprep Automatic - allow pin escape insertion function - doesn't work as expected Locked

1310 views

1 reply

Latest over 6 years ago
by AleksMK
Discussion

why line to SMD Pin same net spacing DRC？they are one the same net. Locked

2639 views

3 replies

Latest over 6 years ago
by johnthanchau
Discussion

DRC ERROR Locked

12728 views

1 reply

Latest over 6 years ago
by steve
Discussion

offsetting a void shape Locked

12206 views

0 replies

Started over 6 years ago
by masamasa
Discussion

Refresh Capture.ini without restarting Capture? Locked

13027 views

0 replies

Started over 6 years ago
by aricbeaver
Discussion

Bend operations disabled due to licensing and/or DLL installation issues Locked

1292 views

2 replies

Latest over 6 years ago
by willbi
Discussion

Allegro 17.2: Logo Creation Locked

17499 views

7 replies

Latest over 6 years ago
by eDave
Discussion

Creating an alternate sch symbol for a multi piece component allegro HDL 17.2 Locked

12377 views

0 replies

Started over 6 years ago
by CharlesP
Discussion

[Capture CIS] Preview 3D model for database parts + more component details Locked

15890 views

6 replies

Latest over 6 years ago
by Mysil B
Discussion

Creating paste stencil with both sides in one stencil Locked

12793 views

0 replies

Started over 6 years ago
by CSCNalu
Discussion

micro-via to buried via spacing Locked

14713 views

3 replies

Latest over 6 years ago
by Lock2002
Discussion

OrCad PCB Editor File Extensions - a definitive list *please* Locked

19392 views

5 replies

Latest over 6 years ago
by Mysil B
Discussion

Setting DC impedance for nets Locked

15346 views

7 replies

Latest over 6 years ago
by Mysil B

Can't delete duplicate properties Locked

Differences between a netclass and a netgroup Locked

Testprep Automatic - allow pin escape insertion function - doesn't work as expected Locked

why line to SMD Pin same net spacing DRC？they are one the same net. Locked

DRC ERROR Locked

offsetting a void shape Locked

Refresh Capture.ini without restarting Capture? Locked

Bend operations disabled due to licensing and/or DLL installation issues Locked

Allegro 17.2: Logo Creation Locked

Creating an alternate sch symbol for a multi piece component allegro HDL 17.2 Locked

[Capture CIS] Preview 3D model for database parts + more component details Locked

Creating paste stencil with both sides in one stencil Locked

micro-via to buried via spacing Locked

OrCad PCB Editor File Extensions - a definitive list *please* Locked

Setting DC impedance for nets Locked

OrCad PCB Editor File Extensions - a definitive list please Locked