Virtuoso Meets Maxwell: Here's All You Must Know to Create a TILP

'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF and Virtuoso MultiTech. So, how does Virtuoso meet Maxwell? Now, Virtuoso supports RF designs, and the RF designers measure the physical and radiation effects by using the Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world along with the nuances of RF, microwave, and high frequency designs. We are posting on Mondays.

Did you get a chance to look at the following two previous posts in the Virtuoso Meets Maxwell series that talked about Technology Independent Layout Pcell (TILP)?

• TILP! What’s a TILP?
• Export the Die? What Am I Exporting? To Where??

I am sure it would have been nearly impossible sometime ago to imagine a feature like this being offered in Virtuoso. Now, the Virtuoso RF Solution has brought the revolution by enabling you to create modules and packages in Virtuoso, thereby, leveraging the new package design capabilities. It is a true multi-technology driven solution that provides technology independence to a TILP. As a result, the TILP has the ability to be used in any design and accept user-preferred units, constraint and parameter values, and user properties on any platform.

You can instantiate die footprints of ICs in the package layout from the package library. Die footprint is the cellview in Virtuoso representing an IC design that includes the layout, schematic, and symbol. Exported die is the cellview that represents the footprint of the die, which will be instantiated in the package design. It contains an abstract, TILP, schematic, and symbol view. IO cell is also instantiated in the die layout to represent its external connectivity. To delve deeper into the process of creating TILPs and know about the various types of views that are generated, see the Creating TILP by Exporting the Die video.

TILPs are created from the die symbols and are added to the libraries as die TILP, SMD TILP, and so on. The die symbols are created from a base layout cell that contains shapes or generic layers. Subsequently, the TILP is instantiated in a parent cell. It can then be imported into the parent cell through an export die library.

TILPs support rotation and mirroring as well. You can attach TILP on the package layer in various positions. It can be flipped, unflipped, or mirrored. Are you curious to know more? Well, stay tuned for the answers in the succeeding TILP episode of the Virtuoso Meets Maxwell series!

Related Resources

• Virtuoso RF Solution
• What’s New in Virtuoso (ICADVM18.1 Only) 

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching!

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Deepti Mishra Gupta