Never miss a story from Digital Design. Subscribe for in-depth analysis and articles.
IR drop is the difference between two endpoints of the conducting wire during a current flow, where the resistance of the conductor will decide the drop percentage. IR drop is also known as the Voltage drop.
So, this Voltage drop in the metal wires weakens the power routing before the actual voltage reaches the power pins of the standard cells, which can affect the speed of the standard cells and the chip's overall performance.
As we all know now, IR drop is an important step to validate a power grid of a layout, so it is recommended to perform an early IR-drop analysis while designing the layout. It can be done using the Innovus® Implementation System.
To explore the answers to all these questions (How to run power analysis?, How to run rail analysis?, How to analyze those IR drop results in Innovus with the help of color maps?), check out the training byte below, which helps in understanding all the basic steps to run IR-drop analysis using Innovus.
How to Run Power Analysis and Analyze the Results in Innovus
Want to Learn More?
If you want to explore more about the RTL-to-GDSII flow, view the lab demos created for each stage of the RTL-to-GDSII flow in the below channel on the Cadence® support site.
RTL-to-GDSII lab demo videos
We can also organize this Cadence RTL-to- GDSII Flow training for you as a "blended" or "live" training. Please reach out to Cadence Training for further information.
Register for the Online Training with the following steps:
Also, don't forget to obtain your Digital Badge after finishing the training.
Cadence RTL-to-GDSII Flow v4.0 (Online)
Genus Synthesis Solution with Stylus Common UI v22.1 (Online)
Test Synthesis with Genus Stylus Common UI vGenus21.1 (Online)
Innovus Block Implementation with Stylus Common UI v22.1 (Online)
Conformal Equivalence Checking v22.1 (Online)
RTL-to-GDSII Flow: I Am Not a Tool but Can Help You Implement Your Entire Design!
Training Insights - Dude, Where's My Software?
Relax in Summer with Cooler IC chips and Ice-Cream! Do you want to Explore the Recipe?
Training Insights – Design Robustness Analysis Application: Aging-Aware STA
How to Route a Design and Perform RC Extraction and Timing Analysis in Innovus
Power Planning and Power Routing
Creating Power Rings, Power Stripes, and Power Rails in Innovus Implementaion System
Innovus LP21_1 Power Analysis Demo
Signoff Considerations for Low-Power Designs
Implementing Low-Power Using Innovus Technology
How to run and interpret results generated by the Early Global Router in Innovus Implementation System
For more information on Cadence’s digital design and signoff products and services, visit www.cadence.com.