Voltus Voice: Voltus-Innovus Integration Avoids Potential Power-Signoff Issues

Voltus^TM IC Power Integrity Solution is a power integrity and analysis signoff solution that is integrated with the full suite of design implementation and signoff tools of Cadence to deliver the industry’s fastest design closure flow.

The aim of this blog series is to broadcast the voices of different experts on how design engineers can effectively use the diverse Voltus technologies to achieve high-performance, accuracy, and capacity for next-gen chip designs.

The age-old proverb “A stitch in time saves nine” highlights the benefits of prior preparations to yield significant savings in the future, or in our field, the power savings through digital design implementation. The more robust a power grid gets in the early design stage, the less prone it is to Crosstalk and IR-drop later at the signoff stage.

But, how can this be achieved and how can one design and optimize a power grid without actual floorplanning and routing? Well, the Cadence Intelligent System Design strategy makes it possible, by providing our customers a seamless design flow during the Place and Route implementation all the way to silicon signoff.

The 'Chip-2-System Power Signoff' video series help you understand how Voltus integrates with a wide breadth of key Cadence products to achieve faster system-level power integrity analysis and closure. The previous video in this series talked about Voltus integration with Sigrity technologies for robust co-analysis of chip, package, and board. In this video, you will be introduced to an Integrated Signoff Closure Flow involving a tight integration between Voltus and Innovus.

Voltus, Cadence’s power and rail signoff tool, couples with Innovus, the physical implementation tool, to ensure power analysis is consistent and convergent throughout the design flow. This integration provides design engineers with a unique solution called Innovus Power Integrity (also known as IR-Aware Full Flow) that enables the interaction between the place and Route implementation and IR drop analysis signoff steps. This approach pulls the potential power signoff issues ahead into the design implementation stage, thereby allowing early feedback, avoiding various difficult and costly design fixes or changes at the signoff stage yielding a clean power integrity signoff.

                  

Several IR drop centric optimization technologies integrated in Innovus Power Integrity solution are:

• Power-Grid Reinforcement: This technique adds reinforcement PG stripes between existing PG stripes to fix the IR drop violations reported from Voltus
• Early Rail Analysis on P&R design: The Early Rail Analysis feature analyzes power-grid integrity early in the floorplanning stage, after placement, as well as postrouting
• IR Drop Aware Placement: The IR drop-aware placement method spreads high power density hotspots, and applies padding to high current density instances
• IR-Aware Clock Tree Synthesis: SkewClock IR Fixing method reduces peak current due to simultaneous register clocking

This Cadence solution for power integrity analysis empowers our customers to:

    

Do watch this second video of the ‘Chip-2-System Power Signoff’ video series to explore the solutions that Innovus-Voltus integration offers at the early stages of a design lifecycle.

Related Resources

RAK	IR Aware placement using Innovus - Voltus
Video	Chip-2-System Power Signoff – Part 2: Voltus-Innovus Integration - YouTube
AppNote	Fixing IR drop violation using IR Aware Full Flow
Blogs	Voltus Voice: Accelerate Power Signoff and Design Closure with this IR Aware Placement Technology Voltus Voice: Accelerate Power Signoff and Design Closure with Targeted Local PG Addition

Tips and Resources

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• To find information on how to get an account on the Cadence Learning and Support portal, see the Support.
• To view the recommended course flows as well as the complete learning plan, check out the Learning Map.
• To explore other Training Bytes videos, go to https://support.cadence.com > Video Library > Learning > Training Bytes (Videos).

If you have questions about courses, schedules, online, public, or live onsite training, reach out to us at Cadence Training.

Want to learn more? Please register for Voltus Power Grid Analysis and Signoff with Stylus Common UI v22.1 (Online) and/or Innovus Block Implementation with Stylus Common UI v22.1 (Online).

There are also Digital Badges available for the respective trainings:

You can become Cadence Certified once you complete the course(s) and share your knowledge and certifications on social media channels. Go straight to the course exam at the Learning and Support Portal.

For more information on Cadence digital design and signoff products and services, visit www.cadence.com/go/voltushs.

About Voltus Voice

“Voltus Voice” showcases our product capabilities and features, and how they empower engineers to meet time-to-market goals for the complex, advanced-node SoCs that are designed for next-gen smart devices. In this monthly blog series, we also share important news, developments, and updates from the Voltus space.

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