[ Liberate ] Cells do not have -extsim_model parameter specified in define_leafcell command

in addition, you have this warning in the logfile,

WARNING (LIB-40): (set_var): Ignored the invalid value '$model' specified for 'extsim_model_include'. It should be set to an absolute file path.

'extsim_model_include' only take full path.

Yes I created the netlist using ADEL (ADE L ~> Simulation ~> Netlist ~> Create) after attaching the symbols to their respective 'av_extracted' views (ADE L ~> Setup ~> Environment ; set the first view to av_extracted).

I also created the netlists using Assura Quantus by choosing the output format to be spice instead of av_extracted. Thanks for pointing this out, I'll try it this way. But here, I'd have to name all the .sp files (for each cell) right?

Does this mean the nmos and pmos leaf cells were being defined automatically because N_18_MM and P_18_MM weren't 'found' in the netlist?

extsim_model_include is being given an absolute path (starting from /) as shown in the question, sorry but I don't know if that's incorrect.

I also see a lot of .scs files under Models/Spectre . There's a Models/Hspice as well. There's no one file called UMC.scs or so. According to the value given to '$model' in 'set model' , how can I know if that's the wrong model file? 

iamKarthikBK said:

read_spice {netlist/INVX1.sp netlist/AND2X1.sp netlist/NAND2X1.sp netlist/OR2X1.sp netlist/NOR2X1.sp netlist/XOR2X1.sp netlist/XNOR2X1.sp}

you need one more read_spice for model file, or add the model file to the existing read_spice. -element option for define_leafcell may still be needed, based on your netlist syntax.

Thanks, the issue was resolved.
But I think the characterization was unsuccessfully even though the .lib file was generated.

Here's the datasheet: https://gist.githubusercontent.com/iamKarthikBK/4f97b17d7bac915da25328ead6e72e05/raw/720ede5bb404fced51602f4515e03739210bcb09/datasheet.txt

I think the simulator was actually unable to simulate the netlists it read in, and hence the wrong output. Am I correct?

Here's the complete log file: https://gist.githubusercontent.com/iamKarthikBK/4f97b17d7bac915da25328ead6e72e05/raw/720ede5bb404fced51602f4515e03739210bcb09/liberate_log.txt 

I don't expect anyone here to go through the entire thing, I will reach out to imec.be for support, but if something seems obvious in this case, then kindly point it out.

Yes I did not specify the areas for any of the cells.

I think part of the error (or the entire thing) is because I have not added '$ALTOSHOME/tools.lnx86/spectre/bin' to my environment PATH. Am I right?

Thanks

Per logfile, the simulation failed. you can do a standalone simulation, using,

spectre xxxxx/sim.sp. then check the logfile. the sim.sp file is in those directories flagged in

 /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.*/

Do I need to specify the model's red_spice in a separate line because it's a .scs file and the other netlists are .sp files?

[VLSI_ANALOG@cad19 liberate]$ spectre /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp

Spectre (R) Circuit Simulator
Version 19.1.0.396.isr8 64bit -- 19 Jun 2020
Copyright (C) 1989-2020 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and Spectre are registered trademarks of Cadence Design
Systems, Inc. All others are the property of their respective holders.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

User: VLSI_ANALOG Host: cad19 HostID: * PID: 27793
Memory available: 308.9285 MB physical: 3.9726 GB
Linux : Red Hat Enterprise Linux Server release 6.9 (Santiago)
CPU Type: Intel(R) Core(TM) i5-2320 CPU @ 3.00GHz
Socket: Processors [Frequency]
0: 0 [3001.0], 1 [1600.0], 2 [1600.0], 3 [1600.0]

System load averages (1min, 5min, 15min) : 0.0 %, 0.5 %, 0.5 %

Simulating `/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp' on cad19 at 6:12:31
PM, Wed May 19, 2021 (process id: 27793).
Current working directory: /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate
Command line:
/home/installs/SPECTRE191/tools/bin/spectre -64 \
/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp
Reading file: /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp
Reading file: /home/installs/SPECTRE191/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading file: /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs

Error found by spectre during circuit read-in.
ERROR (SFE-675): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 69: Cannot run the simulation
because the library file `/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs' included in the
netlist file `/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp' at line 262
does not contain a valid section name. Specify a valid section name using the syntax 'include file_name section=section_name' and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 72: Cannot open the input file
'./SPECTRE/MM180_LVT18_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 73: Cannot open the input file
'./SPECTRE/MM180_LVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 74: Cannot open the input file
'./SPECTRE/MM180_REG18_V124.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 75: Cannot open the input file
'./SPECTRE/MM180_REG33_V114.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 76: Cannot open the input file
'./SPECTRE/MM180_ZVT18_V121.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 77: Cannot open the input file
'./SPECTRE/MM180_ZVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 81: Cannot open the input file
'./SPECTRE/MM180_LVT18_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 82: Cannot open the input file
'./SPECTRE/MM180_LVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 83: Cannot open the input file
'./SPECTRE/MM180_REG18_V124.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 84: Cannot open the input file
'./SPECTRE/MM180_REG33_V114.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 85: Cannot open the input file
'./SPECTRE/MM180_ZVT18_V121.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 86: Cannot open the input file
'./SPECTRE/MM180_ZVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 90: Cannot open the input file
'./SPECTRE/MM180_LVT18_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 91: Cannot open the input file
'./SPECTRE/MM180_LVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 92: Cannot open the input file
'./SPECTRE/MM180_REG18_V124.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 93: Cannot open the input file
'./SPECTRE/MM180_REG33_V114.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 94: Cannot open the input file
'./SPECTRE/MM180_ZVT18_V121.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 95: Cannot open the input file
'./SPECTRE/MM180_ZVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 99: Cannot open the input file
'./SPECTRE/MM180_LVT18_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 100: Cannot open the input file
'./SPECTRE/MM180_LVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 101: Cannot open the input file
'./SPECTRE/MM180_REG18_V124.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 102: Cannot open the input file
'./SPECTRE/MM180_REG33_V114.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 103: Cannot open the input file
'./SPECTRE/MM180_ZVT18_V121.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 104: Cannot open the input file
'./SPECTRE/MM180_ZVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 108: Cannot open the input file
'./SPECTRE/MM180_LVT18_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 109: Cannot open the input file
'./SPECTRE/MM180_LVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 110: Cannot open the input file
'./SPECTRE/MM180_REG18_V124.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 111: Cannot open the input file
'./SPECTRE/MM180_REG33_V114.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 112: Cannot open the input file
'./SPECTRE/MM180_ZVT18_V121.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 113: Cannot open the input file
'./SPECTRE/MM180_ZVT33_V113.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 117: Cannot open the input file
'./SPECTRE/MM180_DIODE_V113.mdl.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 121: Cannot open the input file
'./SPECTRE/MM180_BJT_V112.mdl.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists and
the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 125: Cannot open the input file
'./SPECTRE/MM180_RES_V133.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists and
the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 129: Cannot open the input file
'./SPECTRE/MM180_RES_V133.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists and
the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 133: Cannot open the input file
'./SPECTRE/MM180_RES_V133.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists and
the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 137: Cannot open the input file
'./SPECTRE/MM180_MIMCAP_V101.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 141: Cannot open the input file
'./SPECTRE/MM180_MIMCAP_V101.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
ERROR (SFE-868): "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" 145: Cannot open the input file
'./SPECTRE/MM180_MIMCAP_V101.lib.scs' because either the file name or the directory specified is invalid. Ensure that the specified file exists
and the path to the file is valid. Alternatively, use the -I <path> command-line option to specify the path to the file and rerun the
simulation.
Notice from spectre during circuit read-in.
"/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp" 282: Unsupported Spice2G
option `accurate' skipped.
"/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210519174925563390S0004537.0/sim.sp" 282: Unsupported Spice2G
option `nomod' skipped.

Time for NDB Parsing: CPU = 68.989 ms, elapsed = 251.286 ms.
Time accumulated: CPU = 223.965 ms, elapsed = 251.29 ms.
Peak resident memory used = 58 Mbytes.

Aggregate audit (6:12:31 PM, Wed May 19, 2021):
Time used: CPU = 224 ms, elapsed = 252 ms, util. = 89%.
Time spent in licensing: elapsed = 132 ms, percentage of total = 52.5%.
Peak memory used = 58.1 Mbytes.
Simulation started at: 6:12:31 PM, Wed May 19, 2021, ended at: 6:12:31 PM, Wed May 19, 2021, with elapsed time (wall clock): 252 ms.
spectre completes with 39 errors, 0 warnings, and 2 notices.
spectre terminated prematurely due to fatal error.

iamKarthikBK said:

Specify a valid section name using the syntax 'include file_name section=section_name' and rerun the
simulation.

This means the model file was loaded incorrectly, right?

The wrapper you point the tool to has all sections. you need to include the wrapper using another wrapper, and add the section, eg. 

my_wrapper_tt, inside this file, add,

//// empty fline

simulator lang=spectre insensitive=yes

include  "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs"  section=tt

... more include lines if needed.

Done!

But the values I see in the datasheet are still wrong. 
https://gist.githubusercontent.com/iamKarthikBK/4f97b17d7bac915da25328ead6e72e05/raw/1a7ebe9b6b90343786a791c5815586337cadcb5e/liberate2_log.txt is the log file

your simulation stilled. as I suggested, run the standalone spectre on the sim.sp files. follwo the spectre logfile to correct your settings.

Just to let you know, an issue like you have only takes 0.5hr to solve if you use customer support.

Guangjun Cao said:

your simulation stilled. as I suggested, run the standalone spectre on the sim.sp files. follwo the spectre logfile to correct your settings.

Okay! I'll try it out

Guangjun Cao said:

Just to let you know, an issue like you have only takes 0.5hr to solve if you use customer support.

Yes I've written to imec.be for help, they've asked me to 'stay tuned'.
But nevertheless, thank you so much for your patient replies.

You need to know the basics on how to set up model/wrapper files for simulation.

If a spectre run fails due to model setup, you can follow the logfile/message to correct it. in the previous logfile, it seems the path is not correct, Spectre can not decent to the right file at the location. The message is very clear,

iamKarthikBK said:

ERROR (SFE-868)

You need to know the basics on how to set up model/wrapper files for simulation.

If a spectre run fails due to model setup, you can follow the logfile/message to correct it. in the previous logfile, it seems the path is not correct, Spectre can not decent to the right file at the location. The message is very clear,

iamKarthikBK said:

ERROR (SFE-868)

Guangjun Cao said:

You need to know the basics on how to set up model/wrapper files for simulation.

Yes, sorry about that! I am trying to do this for the first time.

Guangjun Cao said:

Spectre can not decent to the right file at the location

Yes, I am trying to go through the log files and I'll try to find which path it is that is going wrong.
Thanks!

Hi again,

I saw your response in another post, and am surprised you still have not been able to generate the .lib. have you tried standalone Spectre simulation? Do you still have the model related issue?

Hi!

Yes I tried the standalone simulation, and after making some minor changes to the sim.sp file, I was able to get it running (standalone). I am yet to figure how to make it happen for every one of them instead of me going and changing the .sp files manually.

This

* end of instance section for OR2X1_0
VGND GND 0 0
VVDD VDD 0 0.2

.inc '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs'

.option parhier=local redefinedparams=ignore
simulator lang=spectre
altos_op1 options global_param_override=ignore
simulator lang=spice

had to be changed to this

* end of instance section for OR2X1_0
VGND GND 0 0
VVDD VDD 0 0.2

.option parhier=local redefinedparams=ignore
simulator lang=spectre
include "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" section=tt
altos_op1 options global_param_override=ignore
simulator lang=spice

notice the .inc line had to be changed from spice syntax to spectre syntax (because I had to include the section), this is what I tried and the standalone simulation succeeded.

I am yet to figure out how to make it happen on it's own.

While doing this I got an error saying n_18_mm is already defined, so I removed the -element option, and I also made a very obvious mistake while reading the models and netlists

define_leafcell -type nmos -element -pin_position {0 1 2 3} N_18_MM
define_leafcell -type pmos -element -pin_position {0 1 2 3} P_18_MM

read_spice {/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/umc.scs netlist/INVX1.sp netlist/AND2X1.sp netlist/NAND2X1.sp netlist/OR2X1.sp netlist/NOR2X1.sp netlist/XOR2X1.sp netlist/XNOR2X1.sp} 

had to be changed to

define_leafcell -type nmos -pin_position {0 1 2 3} N_18_MM
define_leafcell -type pmos -pin_position {0 1 2 3} P_18_MM

read_spice -format spectre {/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/umc.scs}
read_spice {netlist/INVX1.sp netlist/AND2X1.sp netlist/NAND2X1.sp netlist/OR2X1.sp netlist/NOR2X1.sp netlist/XOR2X1.sp netlist/XNOR2X1.sp} 

this is a portion from my char.tcl file . Notice the read_spice where I read .scs and .sp in the same line (I would have to do -format spectre if its a .scs file right?)

Now the standalone simulation succeeds but then I need to make my char.tcl file be able to do this on it's own.

I did have someone from imec.be 's customer support team, but that was for another issue.
https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/48046/global-nets-in-the-extracted-view is a brief description.

I follow the exact same procedure for drawing the layouts for an INVX1 and a NAND2X1 but Cadence Virtuoso doesn't identify a single pin for INVX1 (gives LVS errors). but it does for the NAND2X1 layout an gives no LVS errors.

I went through the LVS compare and extract rule files that came from the foundry and it clearly takes the text_topin() from a layer '0' which I assume is type drawing. (Sorry I just typed this sentence from what I remember, the function name might be wrong). Initially the purpose of all the pins that were generated was 'ME1 Pin' but now I've made them into a 'ME1 Drawing' because clearly, that's what the compare rule file is looking for. I think.

The imec.be 's support guy said he will try to figure out the LVS issue on their end and get back to me. (Europractice support doesn't work with universities in India directly)

You are not supposed to change the sim.sp syntax. sim.sp is created by Liberate in spice syntax. As I said before, you may need to add simulator lang=spectre in the model wrapper. if the model name in your model file and netlist are not all in upper or lower case, you also need to declare,

Guangjun Cao said:

//// empty fline

simulator lang=spectre insensitive=yes

include  "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs"  section=tt

... more include lines if needed.

you might also need simulator lang=spectre as the last line of your model wrapper.

iamKarthikBK said:

altos_op1 options global_param_override=ignore

If this is really needed, you can use extsim_deck_header option in the script. search extsim_deck_header in the reference manual for example.

you may also need to add -format spice or spectre in read_spice, depending on the file syntax.

If the generated sim.sp does not run, it means your settings are not right. 

Guangjun Cao said:

You are not supposed to change the sim.sp syntax. sim.sp is created by Liberate in spice syntax

I did that to see what can make it work, to get an idea about changing which line in the char.tcl might help.

Guangjun Cao said:

As I said before, you may need to add simulator lang=spectre in the model wrapper. if the model name in your model file and netlist are not all in upper or lower case, you also need to declare,

Yes, this was done. Here's the wrapper I made. I named it `umc.scs`

// empty line
simulator lang=spectre insensitive=yes
include "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" section=tt
include "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_REG18_V124.lib.scs" section=tt
simulator lang=spectre

Guangjun Cao said:

you might also need simulator lang=spectre as the last line of your model wrapper.

Yes that has been done, it can be noticed above.

Guangjun Cao said:

If this is really needed, you can use extsim_deck_header option in the script. search extsim_deck_header in the reference manual for example.

The reference manual says
The extsim_deck_header parameter is available so that the external simulator commands can be provided directly to the external simulator without having Liberate process or review them.

I don't find it necessary, liberate is able to read the netlists. It is able to read the model files as well.

Guangjun Cao said:

If the generated sim.sp does not run, it means your settings are not right. 

Sorry I am not sure what exactly is going wrong to fix it. I understand that it is something to do with the model file being included, but if you see the log file given below, it is able to read the wrapper file, where as shown in one of the lines above, I do mention the sections clearly.

LIBERATE started on cad19 at Thu May 20 23:31:21 2021

Command line arguments: 'tcl/char.tcl'.
ALTOSHOME set to '/home/installs/LIBERATE192'.
Server ID : T20210520233121731219S0026764
LIBERATE parameter "slew_lower_rise" set to "0.2"
LIBERATE parameter "slew_upper_rise" set to "0.8"
LIBERATE parameter "slew_lower_fall" set to "0.2"
LIBERATE parameter "slew_upper_fall" set to "0.8"
LIBERATE parameter "measure_slew_lower_rise" set to "0.2"
LIBERATE parameter "measure_slew_upper_rise" set to "0.8"
LIBERATE parameter "measure_slew_lower_fall" set to "0.2"
LIBERATE parameter "measure_slew_upper_fall" set to "0.8"
LIBERATE parameter "max_transition" set to "6.175e-08"
LIBERATE parameter "extsim_model_include" set to "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/umc.scs"
INFO (LIB-511): (define_leafcell): Leafcell 'N_18_MM' (instance) has been identified with pin_position (0 1 2 3) mapped to (D G S B).
LIBERATE parameter "extsim_exclusive" set to "1"
INFO (LIB-511): (define_leafcell): Leafcell 'P_18_MM' (instance) has been identified with pin_position (0 1 2 3) mapped to (D G S B).
LIBERATE parameter "spectre_pwr" set to "0"
LIBERATE parameter "simulator" set to "spectre"
LIBERATE parameter "char_library_skip_var_list" set to ""
Start Characterizing Library at (Thu May 20 23:31:24 IST 2021)

INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/umc.scs'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/INVX1.sp'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/AND2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/NAND2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/OR2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/NOR2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/XOR2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: 'netlist/XNOR2X1.sp'.
INFO (LIB-943): Finished reading netlist(s) at May 20 23:31:24.
INFO (LIB-711): Feature 'Virtuoso_Multi_mode_Simulation' exists in the license pool. The parameter 'spectre_use_mmsim_token_license' will be set to '1'.
INFO (LIB-1008): (char_library): This LIBERATE release was qualified with MMSIM version '' but newer version '19.1.0.396.isr8' was detected. If MMSIM-related issues are found, update to the qualified MMSIM version and re-run.
INFO (LIB-966): Using Spectre version 19.1.0.396.isr8 located at: /home/installs/SPECTRE191/tools/bin/spectre.
*Info* Use temporary directory '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate'.
LIBERATE parameter "extsim_deck_dir" defaulted to cad19:/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/decks.cad19.T20210520233121731219S0026764
Initializing Spice
*Info* Adding 10 global models to Spice.
Building library database
Processing cell: AND2X1
(May 20 23:31:25) Finish building module.
ERROR (LIB-5048): (LIBERATE): System error - could not execute command: cd /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0; /home/installs/SPECTRE191/tools/bin/spectre +lqt 0 =log sim.lis +libtkn 0001208F0F964DEB4DDB67C73FE609F74FDE77D55BF946F37BD5279610F747F509CF6EC154DA12934B9F70D7629B49EA4ECE0BD3368335D8109B25EB159644D65A996F953AED25A20AD079D119DF75F437E975D9038439E368A824E078E877A20EE943E135B959920DD979D11B8977A237E979D11B8977A237E91977B87CD457574F00003A9A /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0/sim.sp >& /dev/null. Error code: 2.
*Info* Simulation failed to complete. Restart the simulation in 5 seconds on host cad19.
*Info* Run Spectre : (0) at /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0
ERROR (LIB-448): (char_library): Failed to run 'cd /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0; /home/installs/SPECTRE191/tools/bin/spectre +lqt 0 =log sim.lis +libtkn 0001208F0F964DEB4DDB67C73FE609F74FDE77D55BF946F37BD5279610F747F509CF6EC154DA12934B9F70D7629B49EA4ECE0BD3368335D8109B25EB159644D65A996F953AED25A20AD079D119DF75F437E975D9038439E368A824E078E877A20EE943E135B959920DD979D11B8977A237E979D11B8977A237E91977B873D458574F00003A8B /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0/sim.sp >& /dev/null' on host cad19. Spectre exit code: 2 (stop simulation because of Spectre error condition).
ERROR (LIB-5048): (LIBERATE): System error - could not execute command: cd /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0; /home/installs/SPECTRE191/tools/bin/spectre +lqt 0 =log sim.lis +libtkn 0001208F0F964DEB4DDB67C73FE609F74FDE77D55BF946F37BD5279610F747F509CF6EC154DA12934B9F70D7629B49EA4ECE0BD3368335D8109B25EB159644D65A996F953AED25A20AD079D119DF75F437E975D9038439E368A824E078E877A20EE943E135B959920DD979D11B8977A237E979D11B8977A237E91977B872D459574F00003A8B /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/altos.cad19.T20210520233121731219S0026764.0/sim.sp >& /dev/null. Error code: 2.
*Info* Simulation failed to complete. Restart the simulation in 5 seconds on host cad19.
^C
[VLSI_ANALOG@cad19 liberate]$

iamKarthikBK said:

include "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" section=tt

ut, let's say I did not change the syntax to spectre format, and I let it be in spice format as follows:

iamKarthikBK said:

.inc '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs'

I clearly see that its doesn't include the section. That is exactly what the error turned out to be when I ran the standalone simulation. Changing what in the .tcl file will make liberate include this (in the suto-generated spice syntax itself) along with the section?

Thanks

I have a feeling that you have made a simple case complicated.

Liberate does pre-analysis first based on device name/type. It create simple decks in the tmpdir you defined. These decks contains all the devices used in your netlist. If all are successful, it then create decks corresponding to your define_arc commands. If you do not have define_arc commands, liberate will do more analysis, each has difference combination of pins/states, based on which valid arcs are found. Next, liberate will do some initial test runs using simple waveform and initial conditions. The results will be used to create final decks for characterization. The final decks have iterations for slew/load. So, by looking at content of the sim.sp, you will get an idea which step the run has proceeded to. 

iamKarthikBK said:

include "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs" section=tt

If this works in standalone spectre simulation, adding simulator lang=spectre to the top )after a empty line) in your /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs, and simulator lang=spice at the end of the file, should work with the generated command/syntax like,

iamKarthikBK said:

.inc '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs'

It might be easier if you start with the example in <install>/examepl/liberate/. replace the model/netlist/template file/leafcell. Then start start the run. The char_library command in the example does not use -extsim option, which is normally fine with old process node. you can also add -extsim spectre, together with define_leafcell commands. you may still need define_leafcell -element ... , since the instance name does not have a 'x' prefix. check the model wrapper and netlist syntax in the example, and compare it with your files. Make changes (as already discussed before), if needed. 

This would give you a clear start. i helped another new user like this earlier this week . it only took us ~30mins via customer support /webex, to get the first successful characterization.  

Guangjun Cao said:

 simulator lang=spice at the end of the file

This switches the syntax back to spice after reading spice, in the sim.sp. I just realized did a type before.

Guangjun Cao said:

If this works in standalone spectre simulation, adding simulator lang=spectre to the top )after a empty line) in your /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs

This already exists.

// *************************************************************************************************
simulator lang=spectre insensitive=yes
// Last update on 5/26/2005
// WHAT CONTAINS IN THIS LIBRARY:

Guangjun Cao said:

It might be easier if you start with the example in <install>/examepl/liberate/. replace the model/netlist/template file/leafcell. Then start start the run. The char_library command in the example does not use -extsim option, which is normally fine with old process node. you can also add -extsim spectre, together with define_leafcell commands. you may still need define_leafcell -element ... , since the instance name does not have a 'x' prefix. check the model wrapper and netlist syntax in the example, and compare it with your files. Make changes (as already discussed before), if needed. 

Okay, this seemed to work better.
But

ROOT_DIR = /home/installs/LIBERATE192
exepath = /home/installs/LIBERATE192/tools/bin
Host : cad19 x86_64 Linux 2.6.32-696.el6.x86_64
LIBERATE Library Characterization Platform (x86_64)
Release dev, compiled by vficcm on Tue Sep 10 06:33:00 PDT 2019

********************************************************************
* Copyright (c) Cadence Design Systems, Inc. 2006 - 2021. *
* All rights reserved. *
* *
* *
* *
* This program contains confidential and trade secret information *
* of Cadence Design Systems, Inc. and is protected by copyright *
* law and international treaties. Any reproduction, use, *
* distribution or disclosure of this program or any portion of it, *
* or any attempt to obtain a human-readable version of this *
* program, without the express, prior written consent of *
* Cadence Design Systems, Inc., is strictly prohibited. *
* *
* Cadence Design Systems, Inc. *
* 2655 Seely Avenue *
* San Jose, CA 95134, USA *
* *
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********************************************************************


Copyright notices for Open Source and Third Party Tools used by this
software can be viewed at <cds_inst_dir>/doc/liberate/thirdpartyinfo/Notices.txt

LIBERATE started on cad19 at Fri May 21 11:48:29 2021

Command line arguments: 'char.tcl'.
ALTOSHOME set to '/home/installs/LIBERATE192'.
Server ID : T20210521114829619552S0030735
LIBERATE parameter "slew_lower_rise" set to "0.2"
LIBERATE parameter "slew_upper_rise" set to "0.8"
LIBERATE parameter "slew_lower_fall" set to "0.2"
LIBERATE parameter "slew_upper_fall" set to "0.8"
LIBERATE parameter "measure_slew_lower_rise" set to "0.2"
LIBERATE parameter "measure_slew_upper_rise" set to "0.8"
LIBERATE parameter "measure_slew_lower_fall" set to "0.2"
LIBERATE parameter "measure_slew_upper_fall" set to "0.8"
LIBERATE parameter "max_transition" set to "1.5e-08"
LIBERATE parameter "spectre_pwr" set to "0"
LIBERATE parameter "simulator" set to "ski"
LIBERATE parameter "char_library_skip_var_list" set to ""
Start Characterizing Library at (Fri May 21 11:48:32 IST 2021)

*Info* Removing all types
*Info* Max Shared Memory Segments : 4096
*Info* No Shared Memory Segments
*Info* Max Semaphore Arrays : 128
*Info* Max Message Queues : 7577
*Info* No Message Queues
*Info* No Zombie Processes
WARNING (LIB-103): When using Spectre-SKI, runtime may significantly improve when using an extsim_model_include/define_leafcell flow. This is needed to enable the Spectre modellib flow.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/MODELS/include_tt.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/INVX1.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/NAND2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/NOR2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/AND2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/OR2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/XOR2X1.sp'.
INFO (LIB-956): (read_spice): Reading file: '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/NETLIST/XNOR2X1.sp'.
INFO (LIB-943): Finished reading netlist(s) at May 21 11:48:34.
INFO (LIB-711): Feature 'Virtuoso_Multi_mode_Simulation' exists in the license pool. The parameter 'spectre_use_mmsim_token_license' will be set to '1'.
INFO (LIB-1008): (char_library): This LIBERATE release was qualified with MMSIM version '' but newer version '19.1.0.396.isr8' was detected. If MMSIM-related issues are found, update to the qualified MMSIM version and re-run.
*Info* (char_library) : SKI process child signal handler enabled.

INFO (LIB-966): Using Spectre version 19.1.0.396.isr8 located at: /home/installs/SPECTRE191/tools/bin/spectre.
*Info* Use temporary directory '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate'.
LIBERATE parameter "extsim_deck_dir" defaulted to cad19:/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/decks.cad19.T20210521114829619552S0030735

*Info* : Initializing SKI environment...
Initializing Spice
*Info* Adding 2 global models to Spice.
Building library database
Processing cell: AND2X1
WARNING (LIB-519): (char_library): The pin 'in' is not defined for cell 'AND2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'out' is not defined for cell 'AND2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:35) Finish building module.
Processing cell: INVX1
WARNING (LIB-519): (char_library): The pin 'a' is not defined for cell 'INVX1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'b' is not defined for cell 'INVX1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'y' is not defined for cell 'INVX1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:40) Finish building module.
INFO (LIB-501): (char_library): Cannot determine VDD for port 'in' in cell 'INVX1', use default value 0.300V.
INFO (LIB-501): (char_library): Cannot determine VDD for port 'out' in cell 'INVX1', use default value 0.300V.
*Warning* Unable to automatically determine the related_power_pin for pin "out" in cell "INVX1". Assigning to the supply referenced in the default vdd "VDD". Please check the netlist or use set_pin_vdd to avoid such warning.
*Warning* Unable to automatically determine the related_power_pin for pin "in" in cell "INVX1". Assigning to the supply referenced in the default vdd "VDD". Please check the netlist or use set_pin_vdd to avoid such warning.
Processing cell: NAND2X1
WARNING (LIB-519): (char_library): The pin 'in' is not defined for cell 'NAND2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'out' is not defined for cell 'NAND2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:40) Finish building module.
Processing cell: NOR2X1
WARNING (LIB-519): (char_library): The pin 'a' is not defined for cell 'NOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'b' is not defined for cell 'NOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'in' is not defined for cell 'NOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'out' is not defined for cell 'NOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:40) Finish building module.
Processing cell: OR2X1
WARNING (LIB-519): (char_library): The pin 'a' is not defined for cell 'OR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'b' is not defined for cell 'OR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'in' is not defined for cell 'OR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'out' is not defined for cell 'OR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:41) Finish building module.
*Warning* (char_library) : Cell 'OR2X1' has transistors (eg. MavD28_1_unmatched) with floating bulk(s). Bulk nodes should either be connected to supplies or driven by other active devices. Simulation results can be very inaccurate.
Processing cell: XNOR2X1
WARNING (LIB-519): (char_library): The pin 'a' is not defined for cell 'XNOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'in' is not defined for cell 'XNOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'out' is not defined for cell 'XNOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:42) Finish building module.
INFO (LIB-501): (char_library): Cannot determine VDD for port 'b' in cell 'XNOR2X1', use default value 0.300V.
INFO (LIB-501): (char_library): Cannot determine VDD for port 'y' in cell 'XNOR2X1', use default value 0.300V.
Processing cell: XOR2X1
WARNING (LIB-519): (char_library): The pin 'in' is not defined for cell 'XOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
WARNING (LIB-519): (char_library): The pin 'out' is not defined for cell 'XOR2X1'. Check the netlist and make sure it is consistent with 'define_cell' command.
(May 21 11:48:43) Finish building module.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'delay_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
ERROR (LIB-174): (char_library): The template 'passive_power_template_3x3' has an unreasonable '-index_1' slew value of: 794.1 nanoseconds which is greater than the sim_duration (4.8e-07 seconds). Update the 'define_template' and 'define_index' commands or the sim_duration in the Tcl script and rerun.
WARNING (LIB-193): (char_library): Future characterization and modelling commands will be skipped because of the previous error. Correct all Tcl errors and rerun.
LIBERATE parameter "waveform_report" set to "0"
Writing datasheet in text format to /home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/DATASHEET/example.txt
Writing cell group AND2X1
Writing cell group INVX1
Writing cell group NAND2X1
Writing cell group NOR2X1
Writing cell group OR2X1
Writing cell group XNOR2X1
Writing cell group XOR2X1
Peak memory usage: 548 MB
Peak virtual memory usage: 461 MB
Peak physical memory usage: 87 MB
Wall time : 0.01 hours (26.00 seconds)
LIBERATE exited on cad19 at Fri May 21 11:48:55 2021

ERROR: Process ID out of range.
********* simple selection ********* ********* selection by list *********
-A all processes -C by command name
-N negate selection -G by real group ID (supports names)
-a all w/ tty except session leaders -U by real user ID (supports names)
-d all except session leaders -g by session OR by effective group name
-e all processes -p by process ID
-q by process ID (unsorted & quick)
T all processes on this terminal -s processes in the sessions given
a all w/ tty, including other users -t by tty
g OBSOLETE -- DO NOT USE -u by effective user ID (supports names)
r only running processes U processes for specified users
x processes w/o controlling ttys t by tty
*********** output format ********** *********** long options ***********
-o,o user-defined -f full --Group --User --pid --cols --ppid
-j,j job control s signal --group --user --sid --rows --info
-O,O preloaded -o v virtual memory --cumulative --format --deselect
-l,l long u user-oriented --sort --tty --forest --version
-F extra full X registers --heading --no-heading --context
--quick-pid
********* misc options *********
-V,V show version L list format codes f ASCII art forest
-m,m,-L,-T,H threads S children in sum -y change -l format
-M,Z security data c true command name -c scheduling class
-w,w wide output n numeric WCHAN,UID -H process hierarchy
WARNING (LIB-11): (May 21 11:48:55) (char_library): Cannot remove non-empty temporary directory. It is possible that your external simulation run had errors or failed or your NSF file system is extremely slow. If the issue was related to NFS, the directory may get deleted automatically once the NFS sync happens. Otherwise, the files in this directory need to be examined to determine if the root cause is a simulation failure. You may remove the directory manually after examining the files (dir=/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/altos.cad19.T20210521114829619552S0030735.0).
WARNING (LIB-11): (May 21 11:48:55) (char_library): Cannot remove non-empty temporary directory. It is possible that your external simulation run had errors or failed or your NSF file system is extremely slow. If the issue was related to NFS, the directory may get deleted automatically once the NFS sync happens. Otherwise, the files in this directory need to be examined to determine if the root cause is a simulation failure. You may remove the directory manually after examining the files (dir=/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/altos.cad19.T20210521114829619552S0030735.1).
WARNING (LIB-11): (May 21 11:48:55) (char_library): Cannot remove non-empty temporary directory. It is possible that your external simulation run had errors or failed or your NSF file system is extremely slow. If the issue was related to NFS, the directory may get deleted automatically once the NFS sync happens. Otherwise, the files in this directory need to be examined to determine if the root cause is a simulation failure. You may remove the directory manually after examining the files (dir=/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/altos.cad19.T20210521114829619552S0030735.2).
WARNING (LIB-11): (May 21 11:48:55) (char_library): Cannot remove non-empty temporary directory. It is possible that your external simulation run had errors or failed or your NSF file system is extremely slow. If the issue was related to NFS, the directory may get deleted automatically once the NFS sync happens. Otherwise, the files in this directory need to be examined to determine if the root cause is a simulation failure. You may remove the directory manually after examining the files (dir=/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/example/liberate/altos.cad19.T20210521114829619552S0030735.3).

Please ignore the pin warnings, INVX1 has {vdd gnd in out} whereas the other cells have {vdd gnd a b y}

The index 1 value was calculated by me.

I used an inverter in front of an inverter (single load) for the first value, then 4 inverters for the second value, then I calculated the deteriorating factor by extrapolating the values, and for a fanout of 20, i get the delay as 794.1 nanoseconds, and based on the work I'm doing I would expect that. these are 180nm cells operating in subvt with a vdd of 0.3 V and these are the X1 variants of the cells. How do I suppress that error (if that's the only problem here) ?

I assume I only have to increase the sim duration, I don't see sim_duration in the reference manual.
sim_duration 1e-06 right before char_library doesn't seem to work.

thanks

set_var sim_duration 1e-06

seems to work!

But
*Warning*: cell AND2X1 pin=y related_pin=a: The waveform for combinational can not reach full power rail for some slew load combinations. Please check the design and/or char option setings.
*Warning*: cell AND2X1 pin=y related_pin=b: The waveform for combinational can not reach full power rail for some slew load combinations. Please check the design and/or char option setings.
ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'AND2X1', r_pin:'a', r_pin dir:'r', pin:'y', pin dir:'r', type:'combinational rise_transition'. To debug, save and review the simulation results for deck: delay_1 using extsim_save_passed and extsim_save_failed. Possible solutions include setting 'extsim_exclusive' to 1 and 'sim_estimate_duration' to 0 with increased 'sim_duration' as needed, and rerun.
ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'AND2X1', r_pin:'b', r_pin dir:'r', pin:'y', pin dir:'r', type:'combinational rise_transition'. To debug, save and review the simulation results for deck: delay_2 using extsim_save_passed and extsim_save_failed. Possible solutions include setting 'extsim_exclusive' to 1 and 'sim_estimate_duration' to 0 with increased 'sim_duration' as needed, and rerun.
ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'AND2X1', r_pin:'a', r_pin dir:'f', pin:'y', pin dir:'f', type:'combinational fall_transition'. To debug, save and review the simulation results for deck: delay_3 using extsim_save_passed and extsim_save_failed. Possible solutions include setting 'extsim_exclusive' to 1 and 'sim_estimate_duration' to 0 with increased 'sim_duration' as needed, and rerun.
ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'AND2X1', r_pin:'b', r_pin dir:'f', pin:'y', pin dir:'f', type:'combinational fall_transition'. To debug, save and review the simulation results for deck: delay_4 using extsim_save_passed and extsim_save_failed. Possible solutions include setting 'extsim_exclusive' to 1 and 'sim_estimate_duration' to 0 with increased 'sim_duration' as needed, and rerun.

and there are more like this (for other cells)

and thus
*Error* (write_library) : Invalid ecsm data found at points indexed at [ 12 ] in fall_transition for cell:AND2X1 pin:y related_pin:a when:"". Only the indices without any invalid data will be output into any ECSM library written for this ecsm waveform!!
The invalid data may be caused by waveform can not reach full power railPlease check the design and/or char option setings
*Error* (write_library) : Invalid ecsm data found at points indexed at [ 12 ] in fall_transition for cell:AND2X1 pin:y related_pin:b when:"". Only the indices without any invalid data will be output into any ECSM library written for this ecsm waveform!!
The invalid data may be caused by waveform can not reach full power railPlease check the design and/or char option setings
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=a, fall_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=a, rise_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=positive_unate, cell_fall. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=positive_unate, cell_rise. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=positive_unate, fall_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=positive_unate, rise_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=b, fall_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=b, rise_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=positive_unate, cell_fall. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=positive_unate, cell_rise. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=positive_unate, fall_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=AND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=positive_unate, rise_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=INVX1, pin=out, related_pin=in, fall_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=INVX1, pin=out, related_pin=in, timing_type=combinational, timing_sense=negative_unate, cell_fall. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=INVX1, pin=out, related_pin=in, timing_type=combinational, timing_sense=negative_unate, fall_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=a, fall_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=a, rise_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, cell_fall. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, cell_rise. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, fall_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, rise_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=b, fall_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=b, rise_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=negative_unate, cell_fall. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=negative_unate, cell_rise. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=negative_unate, fall_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=NAND2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=negative_unate, rise_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=a, fall_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=a, rise_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, cell_fall. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, cell_rise. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, fall_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=a, timing_type=combinational, timing_sense=negative_unate, rise_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=b, rise_power. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=positive_unate, cell_rise. Check and fix the characterization errors, recharacterize the design, and rewrite the library.
ERROR (LIB-632): (write_library) : The library will be incomplete because only failing characterization results exist for cell=XOR2X1, pin=y, related_pin=b, timing_type=combinational, timing_sense=positive_unate, rise_transition. Check and fix the characterization errors, recharacterize the design, and rewrite the library.

iamKarthikBK said:

*Warning* (char_library) : Cell 'OR2X1' has transistors (eg. MavD28_1_unmatched) with floating bulk(s). Bulk nodes should either be connected to supplies or driven by other active devices. Simulation results can be very inaccurate.

first, make sure this warning is solved. you may have a netlist issue.

iamKarthikBK said:

I don't see sim_duration in the reference manual

It is definitely documented.

you might also need to increase init_delay_period for clock to be larger than your maximum delay+transition, in order for the tool to correctly estimate the transient simulation time for final run.

iamKarthikBK said:

ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'AND2X1', r_pin:'a', r_pin dir:'r', pin:'y', pin dir:'r', type:'combinational rise_transition'. To debug, save and review the simulation results for deck: delay_1 using extsim_save_passed and extsim_save_failed.

follow this suggestion to save the failed decks. then, go to the extsim_deck_dir-->untar the file, cellname/map.list indicats the directory for each arc/deck. open the sim.sp for the failed arc, remove save**none if exists. run spectre on this sim.sp and check the waveform. if the transition does not reach the VDD/VSS, increase the simulation time (.tran comman). if this solves the incomplete transition, increase the sim_duration and init_delay_period (for clock pin). DO NOT USE sim_estimate_duration=0, IT MAY CAUSE INCORRECTLY LARGE POWER.