Stair waveform based on text file

Dear Martinsh,

Martinsh said:

How to generate a stair-like or sample-hold waveform basing on a text file with content as following format.

Mr. Beckett just responded to a question almost identical to yours that provides instructions for creating  a vector file to use in combination with a source. There are many ways to accomplish what you want and Andrew's suggestion is one you might consider. The Forum post with Andrew's response is at URL:

https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/54168/why-doesn-t-a-non-repeating-sequence-simple-voltage-source-exist

Shawn

Dear Shawn,

Vector file gives a digital waveform which has only two voltage levels, logic low and logic high. But the waveform I want is an analog waveform. It has many voltage levels instead of Logic Low and Logic high. Following text gives an example:

0us  1mV        ; Keep output 1mV until next time point (1us)

1us  10mV     ; Keep output 10mV until next time point (2us)

2us  50mV     ; Keep output 50mV until next time point (5us)

5us  20mV    ; Keep output 20mV until next time point (10us)

10us  22mV  ; Keep output 22mV until next time point

...   ...

This Verilog-A model will do what you want. Note the format of the file is slightly different from what you asked - it needs to not use engineering suffixes (see the comment at the top).

`include "disciplines.vams"

// Verilog-A model to produce a staircase (sample and hold)
// waveform given a file with transition points. The format
// of the file is time-value pairs (space separated). Note that
// the numbers cannot have engineering suffixes, so for example
// will look like this:
// 0     1e-3
// 1e-6  10e-3
// 2e-6  50e-3
// 5e-6  20e-3
// 10e-6 22e-3
//
module staircase(voutp,voutn);
output voutp,voutn;
electrical voutp,voutn;
// file name with transition points
parameter string fileName="";
// delay time for each transition
parameter real td=0;
// rise fall for each transition
parameter real trf=1n;
// if non-zero, then waveform will repeat with this period
parameter real repeatTime=0;

integer fp,success;
real tim,val,curval,offset;

analog begin
  @(initial_step) begin
    fp=$fopen(fileName,"r");
    success=$fscanf(fp,"%f %f",tim,val);
  end
  // if repeatTime has been set, reset to beginning of file
  @(timer(repeatTime,repeatTime)) begin
    offset=$abstime;
    $fseek(fp,0,0);
    success=$fscanf(fp,"%f %f",tim,val);
  end
  @(timer(tim+offset)) begin
    curval=val;
    success=$fscanf(fp,"%f %f",tim,val);
    if(success<2) $fseek(fp,0,0);
  end
  V(voutp,voutn)<+transition(curval,td,trf);
end

endmodule

The output waveform looks like this (this was with repeatTime=12u):

Regards,

Andrew

This Verilog-A model will do what you want. Note the format of the file is slightly different from what you asked - it needs to not use engineering suffixes (see the comment at the top).

`include "disciplines.vams"

// Verilog-A model to produce a staircase (sample and hold)
// waveform given a file with transition points. The format
// of the file is time-value pairs (space separated). Note that
// the numbers cannot have engineering suffixes, so for example
// will look like this:
// 0     1e-3
// 1e-6  10e-3
// 2e-6  50e-3
// 5e-6  20e-3
// 10e-6 22e-3
//
module staircase(voutp,voutn);
output voutp,voutn;
electrical voutp,voutn;
// file name with transition points
parameter string fileName="";
// delay time for each transition
parameter real td=0;
// rise fall for each transition
parameter real trf=1n;
// if non-zero, then waveform will repeat with this period
parameter real repeatTime=0;

integer fp,success;
real tim,val,curval,offset;

analog begin
  @(initial_step) begin
    fp=$fopen(fileName,"r");
    success=$fscanf(fp,"%f %f",tim,val);
  end
  // if repeatTime has been set, reset to beginning of file
  @(timer(repeatTime,repeatTime)) begin
    offset=$abstime;
    $fseek(fp,0,0);
    success=$fscanf(fp,"%f %f",tim,val);
  end
  @(timer(tim+offset)) begin
    curval=val;
    success=$fscanf(fp,"%f %f",tim,val);
    if(success<2) $fseek(fp,0,0);
  end
  V(voutp,voutn)<+transition(curval,td,trf);
end

endmodule

The output waveform looks like this (this was with repeatTime=12u):

Regards,

Andrew

Andrew,

Thanks. Timer based solution is a good idea but there is another problem. When I run a Tran simulation, if the start time isn't 0s, for example start=8u, the output waveform is not expected. Do you have any idea on this problem?

BR,

Martin

Martinsh said:

Timer based solution is a good idea but there is another problem. When I run a Tran simulation, if the start time isn't 0s, for example start=8u, the output waveform is not expected. Do you have any idea on this problem?

Martin,

A small update to the model fixes this:

`include "disciplines.vams"

// Verilog-A model to produce a staircase (sample and hold)
// waveform given a file with transition points. The format
// of the file is time-value pairs (space separated). Note that
// the numbers cannot have engineering suffixes, so for example
// will look like this:
// 0     1e-3
// 1e-6  10e-3
// 2e-6  50e-3
// 5e-6  20e-3
// 10e-6 22e-3
//
module staircase(voutp,voutn);
output voutp,voutn;
electrical voutp,voutn;
// file name with transition points
parameter string fileName="";
// delay time for each transition
parameter real td=0;
// rise fall for each transition
parameter real trf=1n;
// if non-zero, then waveform will repeat with this period
parameter real repeatTime=0;

integer fp,success;
real tim,val,curval,offset;

analog begin
  @(initial_step) begin
    fp=$fopen(fileName,"r");
    success=$fscanf(fp,"%f %f",tim,val);
    // deal with non-zero start time for transient
    while(success==2 && tim<$abstime) begin
      curval=val;
      success=$fscanf(fp,"%f %f",tim,val);
    end
  end
  // if repeatTime has been set, reset to beginning of file
  @(timer(repeatTime,repeatTime)) begin
    offset=$abstime;
    $fseek(fp,0,0);
    success=$fscanf(fp,"%f %f",tim,val);
  end
  @(timer(tim+offset)) begin
    curval=val;
    success=$fscanf(fp,"%f %f",tim,val);
    if(success<2) $fseek(fp,0,0);
  end
  V(voutp,voutn)<+transition(curval,td,trf);
end

endmodule

Andrew

Thanks Andrew! It works well.