Custom IC Design

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Discussion

VSR multi-level auto routing

Category: Custom IC Design

By henriqueiesam

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started over 6 years ago

0 replies • 13764 views
Discussion

Timestamp warning when using ADE Assembler (Maestro)

Category: Custom IC Design

By HoWei

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started over 6 years ago

0 replies • 13659 views
Discussion

How to check simulation time of block ?

Category: Custom IC Design

By Asako

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started over 6 years ago

0 replies • 13613 views
Discussion

define specs in adexl in text editor or batch mode? or batch tool for checking vdsat and vsat_margin?

Category: Custom IC Design

By monglebest

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updated over 6 years ago by monglebest

2 replies • 14448 views
Discussion

Using multiple dynamic parameters when one is a variable

Category: Custom IC Design

By DouglasAH

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updated over 6 years ago by DouglasAH

4 replies • 17452 views
Discussion

Making schematic from layout

Category: Custom IC Design

By suchende

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started over 6 years ago

0 replies • 13337 views
Discussion

Dotted lines by default in ViVA

Category: Custom IC Design

By BaaB

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updated over 6 years ago by Andrew Beckett

14 replies • 26008 views
Discussion

Standard Cell Library Integration

Category: Custom IC Design

By DrM1ller

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updated over 6 years ago by Andrew Beckett

1 replies • 14674 views
Discussion

Schematic returns to most upper level when click Main Form or Transient Signal

Category: Custom IC Design

By BaaB

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updated over 6 years ago by BaaB

4 replies • 14476 views
Discussion

deepprobe to a bussed net in AMS

Category: Custom IC Design

By paguirre78

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updated over 6 years ago by paguirre78

5 replies • 21439 views
Discussion

Difference between dft and the Spectrum

Category: Custom IC Design

By FormerMember

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updated over 6 years ago by Andrew Beckett

8 replies • 15735 views
Discussion

Transient Noise Analyses in Cadence

Category: Custom IC Design

By FormerMember

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updated over 6 years ago by FormerMember

9 replies • 27575 views
Discussion

nlSetPcellName for a resistor

Category: Custom IC Design

By chqian

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updated over 6 years ago by chqian

3 replies • 14299 views
Discussion

Backwards Time Simulation to Determine Boundaries of Convergence

Category: Custom IC Design

By mstrong5

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updated over 6 years ago by mstrong5

2 replies • 13882 views
Discussion

How to measure deterministic jitter from eye-diagram by using command

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

5 replies • 21037 views

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