Custom IC Design

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Discussion

Run Quantus fails: depending on which account it is being used from

Category: Custom IC Design

By gaddan14

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updated over 2 years ago by ShawnLogan

1 replies • 7696 views
Discussion

How to extract the junction capacitor in pmos capacitor??

Category: Custom IC Design

By chjang

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updated over 2 years ago by Guangjun Cao

3 replies • 8312 views
Discussion

Is it possible to do transient simulation with and without transient noise in one go?

Category: Custom IC Design

By delgsy

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updated over 2 years ago by delgsy

4 replies • 7463 views
Discussion

ViVA : Save image issue

Category: Custom IC Design

By StephanWeber

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updated over 2 years ago by StephanWeber

2 replies • 7475 views
Discussion

Assembler MC: When is combine button available?

Category: Custom IC Design

By StephanWeber

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updated over 2 years ago by StephanWeber

2 replies • 6585 views
Discussion

How to display dc simulation result of bus as decimal number

Category: Custom IC Design

By IKIF

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updated over 2 years ago by ShawnLogan

5 replies • 9251 views
Discussion

Run plan: Can I edit Design Variable setting?

Category: Custom IC Design

By StephanWeber

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updated over 2 years ago by Andrew Beckett

1 replies • 6677 views
Discussion

Analog Lib Switch

Category: Custom IC Design

By IEEE

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updated over 2 years ago by Andrew Beckett

2 replies • 9443 views
Discussion

check instance binding layout Vs Schematic

Category: Custom IC Design

By jaapvds

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updated over 2 years ago by Andrew Beckett

4 replies • 7987 views
Discussion

What is currently the most straight-forward way to retrieve the metadata of a simulation

Category: Custom IC Design

By ExcaIibur

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updated over 2 years ago by Andrew Beckett

1 replies • 7057 views
Discussion

Minimum realizable capacitance in UMC180nm Technology

Category: Custom IC Design

By Shankaranarayana

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updated over 2 years ago by Andrew Beckett

1 replies • 6547 views
Discussion

spectre: save all currents connected to a given node, but exclude given connections

Category: Custom IC Design

By Zol

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updated over 2 years ago by Andrew Beckett

3 replies • 8537 views
Discussion

save ahdl variable option

Category: Custom IC Design

By sjwprcker

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updated over 2 years ago by Andrew Beckett

1 replies • 7331 views
Discussion

How to insert a probe for stb analysis without disturbing LVS?

Category: Custom IC Design

By StephanWeber

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updated over 2 years ago by drdanmc

7 replies • 11424 views
Discussion

Measurements across montecarlo

Category: Custom IC Design

By sandrone

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started over 2 years ago

0 replies • 6368 views

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