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Custom IC Design

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  • Discussion

    ERROR (SFE-23): "input.scs" 19: X0 is an instance of an undefined model f_opAmp.

    Category: Custom IC Design

    By Jaisal

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    •

    updated over 7 years ago by Nicolas Callens

    1 replies • 2851 views
  • Discussion

    Filter Layout pins from LVS

    Category: Custom IC Design

    By PietroUser

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    •

    updated over 7 years ago by Andrew Beckett

    3 replies • 14741 views
  • Discussion

    Will different save options cause different Spectre simulation time?

    Category: Custom IC Design

    By Cambridge Lv

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    updated over 7 years ago by Cambridge Lv

    2 replies • 1406 views
  • Discussion

    how to enforce identical MC mismatch variation on sub circuit used for calibration as those applied on the main test bench

    Category: Custom IC Design

    By HansB

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    •

    updated over 7 years ago by HansB

    2 replies • 14458 views
  • Discussion

    Device parameters not netlisting in LVS

    Category: Custom IC Design

    By analogmatch

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    •

    started over 7 years ago

    0 replies • 13931 views
  • Discussion

    Cadence simulation setup-core usage-

    Category: Custom IC Design

    By AllenD

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    •

    updated over 7 years ago by Andrew Beckett

    3 replies • 3296 views
  • Discussion

    Liberate for .lib generation of D flip flop

    Category: Custom IC Design

    By anandmohan

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    •

    updated over 7 years ago by anandmohan

    2 replies • 16348 views
  • Discussion

    PAC + PSS for a single-inductor multiple-output (SIMO) converter with verilogA

    Category: Custom IC Design

    By BaaB

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    •

    updated over 7 years ago by BaaB

    2 replies • 14139 views
  • Discussion

    Changing x-value of a signal and/or handle signals with multiple outputs

    Category: Custom IC Design

    By itos

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    updated over 7 years ago by Andrew Beckett

    3 replies • 2930 views
  • Discussion

    PSS not completing in post extraction design

    Category: Custom IC Design

    By praveenmv

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    •

    updated over 7 years ago by Dimitra Papazoglou

    4 replies • 17238 views
  • Discussion

    flattening a cell

    Category: Custom IC Design

    By rocad

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    •

    updated over 7 years ago by Andrew Beckett

    2 replies • 15577 views
  • Discussion

    How to do "multiplication" in freq. domain with provided noise data file?

    Category: Custom IC Design

    By Cod Liang

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    •

    updated over 7 years ago by Andrew Beckett

    3 replies • 3380 views
  • Discussion

    Performance of BSIM-CMG 110.0.0 FinFET SPICE model in spectre simulator

    Category: Custom IC Design

    By MrFinFET

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    •

    updated over 7 years ago by Andrew Beckett

    1 replies • 14832 views
  • Discussion

    Verilog-a implementation of TFET

    Category: Custom IC Design

    By archity

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    •

    started over 7 years ago

    0 replies • 14558 views
  • Discussion

    IC617 import GDS file from TSMC.

    Category: Custom IC Design

    By AllenD

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    •

    updated over 7 years ago by Andrew Beckett

    3 replies • 16917 views
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