Custom IC Design

Latest Posts

Discussion

Specifying Operating Region Expressions Using the Operating Region Assistant Pane in ADEXL

Category: Custom IC Design

By NorNand

$usertype
•
updated over 5 years ago by NorNand

1 replies • 15473 views
Discussion

pnoise jitter and pnoise time average discrepency: what is the problem?

Category: Custom IC Design

By skylink

$usertype
•
updated over 5 years ago by skylink

12 replies • 25940 views
Discussion

Call Python Function from Verilog A Device Model

Category: Custom IC Design

By cerealkiller

$usertype
•
updated over 5 years ago by Herge

1 replies • 15088 views
Discussion

phase noise/vin vs. frequency

Category: Custom IC Design

By skylink

$usertype
•
updated over 5 years ago by skylink

2 replies • 2057 views
Discussion

What is thermal noise called

Category: Custom IC Design

By wgtkan

$usertype
•
updated over 5 years ago by wgtkan

2 replies • 16601 views
Discussion

Reading from a file in Verilog-A

Category: Custom IC Design

By Manev

$usertype
•
updated over 5 years ago by Andrew Beckett

4 replies • 18070 views
Discussion

monte carlo simulation

Category: Custom IC Design

By Nathan Chen

$usertype
•
updated over 5 years ago by Frank Wiedmann

2 replies • 15250 views
Discussion

Question on ADE Assembler (maestro) corner setup

Category: Custom IC Design

By yizhu1

$usertype
•
updated over 5 years ago by yizhu1

4 replies • 16772 views
Discussion

Save VHDL variables of specific hierachy

Category: Custom IC Design

By michael10

$usertype
•
updated over 5 years ago by michael10

2 replies • 14633 views
Discussion

Libraries not imported in the Library manager

Category: Custom IC Design

By UUinfini

$usertype
•
updated over 5 years ago by UUinfini

8 replies • 19070 views
Discussion

Does MC mismatch simulation reflect best or arbitrary layout ?

Category: Custom IC Design

By HoWei

$usertype
•
updated over 5 years ago by HoWei

4 replies • 17546 views
Discussion

Stability check issue during phase starting with 0 degree

Category: Custom IC Design

By MIN KIM

$usertype
•
updated over 5 years ago by Frank Wiedmann

3 replies • 19323 views
Discussion

Stability factor of differential LNA

Category: Custom IC Design

By Qusai

$usertype
•
updated over 5 years ago by FormerMember

7 replies • 19024 views
Discussion

Transient Violations taking too much disk space

Category: Custom IC Design

By ChrisG04

$usertype
•
updated over 5 years ago by ChrisG04

2 replies • 15608 views
Discussion

ADE Explorer switch view list

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 5 years ago by Andrew Beckett

3 replies • 6610 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.