Custom IC Design

Latest Posts

Discussion

Import spice netlist to schematic, problem with "netset" property

Category: Custom IC Design

By Fabrizio Mannozzi

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updated over 4 years ago by Fabrizio Mannozzi

1 replies • 3765 views
Discussion

What is the difference between id and ids of a MOS operating parameter

Category: Custom IC Design

By RFStuff

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updated over 4 years ago by Andrew Beckett

4 replies • 19994 views
Discussion

Spectre : Invalid component name was given as value of parameter

Category: Custom IC Design

By kevin998x

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updated over 4 years ago by Andrew Beckett

6 replies • 16332 views
Discussion

Why Kirchhoff's Current Law is not satisfied at my circuit?

Category: Custom IC Design

By yysunj

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updated over 4 years ago by yysunj

14 replies • 7649 views
Discussion

PAC simulation issue, "No valid time points are specified"

Category: Custom IC Design

By venkmanbuster

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updated over 4 years ago by Andrew Beckett

4 replies • 2400 views
Discussion

LVS and QRC in higher hierarchical layout design level

Category: Custom IC Design

By Senan

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started over 4 years ago

0 replies • 10669 views
Discussion

Difference between "Extract Layout" and "Update" in Cadence Virtuoso Layout tools

Category: Custom IC Design

By Senan

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updated over 4 years ago by Senan

4 replies • 2628 views
Discussion

Extract Layout tool in Cadence Virtuoso

Category: Custom IC Design

By Senan

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updated over 4 years ago by Senan

2 replies • 12780 views
Discussion

how to set env variable of probe option

Category: Custom IC Design

By sjwprcker

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updated over 4 years ago by sjwprcker

2 replies • 11292 views
Discussion

conflict between schematic_pin view and symbol view

Category: Custom IC Design

By sidm

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updated over 4 years ago by sidm

4 replies • 12675 views
Discussion

Ohm My God!

Category: Custom IC Design

By CADcasualty

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updated over 4 years ago by CADcasualty

4 replies • 12242 views
Discussion

sample count

Category: Custom IC Design

By abdurrahman0234

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updated over 4 years ago by abdurrahman0234

15 replies • 16048 views
Discussion

How to backannotate Monte-Carlo DCOP simulation results to schematic

Category: Custom IC Design

By eivan

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updated over 4 years ago by eivan

2 replies • 11681 views
Discussion

generating DC files for inter-dependent Tests in ADEXL

Category: Custom IC Design

By Niccolo Lacaita

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started over 4 years ago

0 replies • 10544 views
Discussion

problem with strobe period

Category: Custom IC Design

By Medya

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updated over 4 years ago by Andrew Beckett

5 replies • 21735 views

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