Custom IC Design

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Discussion

Cascaded display.drf loading

Category: Custom IC Design

By CADcasualty

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updated over 7 years ago by Andrew Beckett

6 replies • 26241 views
Discussion

how to run skill script from csh

Category: Custom IC Design

By qkoyote

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updated over 7 years ago by qkoyote

3 replies • 16109 views
Discussion

Post-simulation error

Category: Custom IC Design

By tahm

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updated over 7 years ago by Andrew Beckett

3 replies • 15518 views
Discussion

How to use a component (VerilogA) within a .scs model file to drive output signals

Category: Custom IC Design

By MT13

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updated over 7 years ago by MT13

7 replies • 18188 views
Discussion

ERROR (SFE-23): "input.scs" 19: X0 is an instance of an undefined model f_opAmp.

Category: Custom IC Design

By Jaisal

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updated over 7 years ago by Nicolas Callens

1 replies • 2765 views
Discussion

Filter Layout pins from LVS

Category: Custom IC Design

By PietroUser

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updated over 7 years ago by Andrew Beckett

3 replies • 14347 views
Discussion

Will different save options cause different Spectre simulation time?

Category: Custom IC Design

By Cambridge Lv

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updated over 7 years ago by Cambridge Lv

2 replies • 1315 views
Discussion

how to enforce identical MC mismatch variation on sub circuit used for calibration as those applied on the main test bench

Category: Custom IC Design

By HansB

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updated over 7 years ago by HansB

2 replies • 14031 views
Discussion

Device parameters not netlisting in LVS

Category: Custom IC Design

By analogmatch

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started over 7 years ago

0 replies • 13578 views
Discussion

Cadence simulation setup－core usage-

Category: Custom IC Design

By AllenD

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updated over 7 years ago by Andrew Beckett

3 replies • 3096 views
Discussion

Liberate for .lib generation of D flip flop

Category: Custom IC Design

By anandmohan

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updated over 7 years ago by anandmohan

2 replies • 15856 views
Discussion

PAC + PSS for a single-inductor multiple-output (SIMO) converter with verilogA

Category: Custom IC Design

By BaaB

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updated over 7 years ago by BaaB

2 replies • 13750 views
Discussion

Changing x-value of a signal and/or handle signals with multiple outputs

Category: Custom IC Design

By itos

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updated over 7 years ago by Andrew Beckett

3 replies • 2734 views
Discussion

PSS not completing in post extraction design

Category: Custom IC Design

By praveenmv

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updated over 7 years ago by Dimitra Papazoglou

4 replies • 16747 views
Discussion

flattening a cell

Category: Custom IC Design

By rocad

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updated over 7 years ago by Andrew Beckett

2 replies • 15140 views

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