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Custom IC Design

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  • Discussion

    error in Virtuoso 6.1

    Category: Custom IC Design

    By kashvi

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    updated over 16 years ago by Andrew Beckett

    1 replies • 14010 views
  • Discussion

    Netlisting error when using hspiceD simulator in cadence 5.14

    Category: Custom IC Design

    By isazulkc

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    •

    updated over 16 years ago by isazulkc

    5 replies • 17078 views
  • Discussion

    symbol view for VHDL structures

    Category: Custom IC Design

    By PrachiB

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    •

    started over 16 years ago

    0 replies • 13667 views
  • Discussion

    question on multiple layout views to be use for 1 schematic

    Category: Custom IC Design

    By zeroskills

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    updated over 16 years ago by Andrew Beckett

    6 replies • 18523 views
  • Discussion

    Ocean Script error--branch distance too far from generated code

    Category: Custom IC Design

    By lunren

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    •

    updated over 16 years ago by lunren

    8 replies • 3875 views
  • Discussion

    ncvhdl8.2 - can I create symbols for my VHDL structures and use them in schematics

    Category: Custom IC Design

    By PrachiB

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    updated over 16 years ago by PrachiB

    2 replies • 2432 views
  • Discussion

    ADE won't show all output options for some tests

    Category: Custom IC Design

    By Grover

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    updated over 16 years ago by Andrew Beckett

    1 replies • 975 views
  • Discussion

    ASSURA 3.1.6 - errors on input/output pins

    Category: Custom IC Design

    By yoyega

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    updated over 16 years ago by yoyega

    2 replies • 1489 views
  • Discussion

    Weird netlisting problem with controlled sources

    Category: Custom IC Design

    By Finn

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    •

    updated over 16 years ago by Finn

    2 replies • 15342 views
  • Discussion

    Ocean script method to modify spectre netlist

    Category: Custom IC Design

    By markbeck

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    •

    updated over 16 years ago by markbeck

    4 replies • 16103 views
  • Discussion

    skill/ocean command to modify netlist?

    Category: Custom IC Design

    By markbeck

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    •

    updated over 16 years ago by Andrew Beckett

    1 replies • 1018 views
  • Discussion

    Parameter Arrays in Cadence Schematic

    Category: Custom IC Design

    By gokce

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    •

    updated over 16 years ago by Andrew Beckett

    1 replies • 16318 views
  • Discussion

    forking ocean scripts?

    Category: Custom IC Design

    By markbeck

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    •

    updated over 16 years ago by markbeck

    4 replies • 14802 views
  • Discussion

    Waveform viewer settings

    Category: Custom IC Design

    By archive

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    •

    updated over 16 years ago by archive

    2 replies • 14714 views
  • Discussion

    Simulating the verilog +Analog

    Category: Custom IC Design

    By Stud ent

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    •

    updated over 16 years ago by Andrew Beckett

    1 replies • 13898 views
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