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Custom IC Design

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  • Discussion

    PSS simulation

    Category: Custom IC Design

    By svilen

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    updated over 6 years ago by JackieTheBanan

    13 replies • 29588 views
  • Discussion

    Model of Transient Noise Simulation in Cadence

    Category: Custom IC Design

    By Zhao Hui

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    updated over 6 years ago by Andrew Beckett

    3 replies • 14237 views
  • Discussion

    Is there any tips & simulator settings to accelerate tran initial converge of ams top analog&digital simulation ?

    Category: Custom IC Design

    By Zest

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    updated over 6 years ago by Andrew Beckett

    2 replies • 1204 views
  • Discussion

    Save subcircuit instance nets in ADE Assembler

    Category: Custom IC Design

    By NZimmermann

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    updated over 6 years ago by NZimmermann

    2 replies • 16140 views
  • Discussion

    Abstract LEF files with Abstract generator

    Category: Custom IC Design

    By fengye

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    updated over 6 years ago by fengye

    2 replies • 16154 views
  • Discussion

    "Assura has not been installed in this hierarchy" Error

    Category: Custom IC Design

    By nokta

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    updated over 6 years ago by nokta

    2 replies • 3770 views
  • Discussion

    use output signals from other circuits as input for simulation

    Category: Custom IC Design

    By BaaB

    $usertype

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    updated over 6 years ago by Andrew Beckett

    3 replies • 16234 views
  • Discussion

    Setting TimeStep for Transient simulations : defaulting to ps

    Category: Custom IC Design

    By HariV

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    updated over 6 years ago by FormerMember

    3 replies • 24072 views
  • Discussion

    Dynamic nodesets on DC Sweeps

    Category: Custom IC Design

    By Johanny Saenz

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    updated over 6 years ago by Andrew Beckett

    1 replies • 14248 views
  • Discussion

    Unable to do some functions in the layout. Getting Errors

    Category: Custom IC Design

    By Bala Sowjanya

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    updated over 6 years ago by Andrew Beckett

    1 replies • 14319 views
  • Discussion

    Sweeping different design variables at the same time within an (qpss) analysis

    Category: Custom IC Design

    By Emiel

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    updated over 6 years ago by Andrew Beckett

    3 replies • 15775 views
  • Discussion

    shortcut to bring ADE with current schematic to front

    Category: Custom IC Design

    By BaaB

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    •

    updated over 6 years ago by Andrew Beckett

    20 replies • 20900 views
  • Discussion

    Parallelizing simulation with a variable sweep in an analysis itself

    Category: Custom IC Design

    By Emiel

    $usertype

    •

    updated over 6 years ago by Andrew Beckett

    1 replies • 14823 views
  • Discussion

    how to define different sweep variables for different test within the same adexl

    Category: Custom IC Design

    By Karev11

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    •

    updated over 6 years ago by Andrew Beckett

    3 replies • 16067 views
  • Discussion

    Abstract physical information file (.LEF) of standard cell

    Category: Custom IC Design

    By fengye

    $usertype

    •

    updated over 6 years ago by fengye

    9 replies • 19533 views
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