Custom IC Design

Latest Posts

Discussion

Options to set Environment Variables with envSetVal

Category: Custom IC Design

By greywanderer

$usertype
•
updated over 4 years ago by Andrew Beckett

4 replies • 19593 views
Discussion

How can I adjust time range of result?

Category: Custom IC Design

By yysunj

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 11808 views
Discussion

How can I get raw data at Cadence virtuoso?

Category: Custom IC Design

By yysunj

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 12286 views
Discussion

Explanation for sampled PXF analysis

Category: Custom IC Design

By david73

$usertype
•
updated over 4 years ago by Andrew Beckett

4 replies • 20842 views
Discussion

Import spice netlist to schematic, problem with "netset" property

Category: Custom IC Design

By Fabrizio Mannozzi

$usertype
•
updated over 4 years ago by Fabrizio Mannozzi

1 replies • 3800 views
Discussion

What is the difference between id and ids of a MOS operating parameter

Category: Custom IC Design

By RFStuff

$usertype
•
updated over 4 years ago by Andrew Beckett

4 replies • 20105 views
Discussion

Spectre : Invalid component name was given as value of parameter

Category: Custom IC Design

By kevin998x

$usertype
•
updated over 4 years ago by Andrew Beckett

6 replies • 16457 views
Discussion

Why Kirchhoff's Current Law is not satisfied at my circuit?

Category: Custom IC Design

By yysunj

$usertype
•
updated over 4 years ago by yysunj

14 replies • 7749 views
Discussion

PAC simulation issue, "No valid time points are specified"

Category: Custom IC Design

By venkmanbuster

$usertype
•
updated over 4 years ago by Andrew Beckett

4 replies • 2424 views
Discussion

LVS and QRC in higher hierarchical layout design level

Category: Custom IC Design

By Senan

$usertype
•
started over 4 years ago

0 replies • 10725 views
Discussion

Difference between "Extract Layout" and "Update" in Cadence Virtuoso Layout tools

Category: Custom IC Design

By Senan

$usertype
•
updated over 4 years ago by Senan

4 replies • 2661 views
Discussion

Extract Layout tool in Cadence Virtuoso

Category: Custom IC Design

By Senan

$usertype
•
updated over 4 years ago by Senan

2 replies • 12865 views
Discussion

how to set env variable of probe option

Category: Custom IC Design

By sjwprcker

$usertype
•
updated over 4 years ago by sjwprcker

2 replies • 11359 views
Discussion

conflict between schematic_pin view and symbol view

Category: Custom IC Design

By sidm

$usertype
•
updated over 4 years ago by sidm

4 replies • 12754 views
Discussion

Ohm My God!

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 4 years ago by CADcasualty

4 replies • 12325 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.