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Custom IC Design

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  • Discussion

    Error When Running AMS Simulations with Both VHDL and Verilog in Digital Heirarchy

    Category: Custom IC Design

    By amrao

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    updated over 4 years ago by amrao

    3 replies • 13112 views
  • Discussion

    Cadence Liberate CCS Power Characterization Accuracy

    Category: Custom IC Design

    By anurans

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    •

    updated over 4 years ago by anurans

    4 replies • 14016 views
  • Discussion

    Is there leakage current in Analoglib's cap?

    Category: Custom IC Design

    By yysunj

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    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 1128 views
  • Discussion

    ViVa Bookmarks and its usage

    Category: Custom IC Design

    By TommasoF

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    •

    updated over 4 years ago by TommasoF

    4 replies • 12432 views
  • Discussion

    DC sweep with a static cap voltage

    Category: Custom IC Design

    By Darrell L

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    started over 4 years ago

    0 replies • 10439 views
  • Discussion

    How can I reverse the color of the black background and the white axis value?

    Category: Custom IC Design

    By yysunj

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    •

    updated over 4 years ago by yysunj

    2 replies • 14200 views
  • Discussion

    Control precision/significant decimals in ADEXL results

    Category: Custom IC Design

    By Shankar PA

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    updated over 4 years ago by Shankar PA

    7 replies • 10084 views
  • Discussion

    Cadence Virtuoso Jop Policy Setup

    Category: Custom IC Design

    By Senan

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    updated over 4 years ago by Senan

    2 replies • 13514 views
  • Discussion

    Partially auto via

    Category: Custom IC Design

    By chanho

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    •

    updated over 4 years ago by Andrew Beckett

    5 replies • 11954 views
  • Discussion

    Import data (.csv file) to Cadence

    Category: Custom IC Design

    By Mai M

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    updated over 4 years ago by Andrew Beckett

    2 replies • 13610 views
  • Discussion

    Not able add pins to symbol; restricted by string length

    Category: Custom IC Design

    By ajmr

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    •

    updated over 4 years ago by ajmr

    4 replies • 11511 views
  • Discussion

    Greyed menu: "Run Assura Quantus QRC..." and "Run Assura Quantus QRC..."

    Category: Custom IC Design

    By manudupouy

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    updated over 4 years ago by WenhaoY

    35 replies • 26130 views
  • Discussion

    Convert Digital Bus to an Integer value - Calculator Viva

    Category: Custom IC Design

    By FAwqati

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    •

    updated over 4 years ago by abdurrahman0234

    10 replies • 21064 views
  • Discussion

    Reduce the spacing between metals while placing stack auto via.

    Category: Custom IC Design

    By skillEater

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    updated over 4 years ago by chanho

    7 replies • 17814 views
  • Discussion

    ViVA Customization using .cdsinit

    Category: Custom IC Design

    By hoodskier

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    •

    updated over 4 years ago by Andrew Beckett

    10 replies • 23229 views
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