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Custom IC Design

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  • Discussion

    How to open Cadence 6.15 using AMS CMOS 0.35um design kit

    Category: Custom IC Design

    By UUinfini

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    updated over 8 years ago by uschi

    1 replies • 14259 views
  • Discussion

    Body Connection for 18nm process finfet

    Category: Custom IC Design

    By myjan

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    updated over 8 years ago by Andrew Beckett

    1 replies • 14345 views
  • Discussion

    How to generate warning messages for transient analysis?

    Category: Custom IC Design

    By AnnaS

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    updated over 8 years ago by Andrew Beckett

    11 replies • 23235 views
  • Discussion

    n-tones sine wave

    Category: Custom IC Design

    By AllenD

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    updated over 8 years ago by Andrew Beckett

    1 replies • 15822 views
  • Discussion

    Incisive Digital Design Workflow

    Category: Custom IC Design

    By dpalomeq

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    updated over 8 years ago by Andrew Beckett

    1 replies • 14109 views
  • Discussion

    How to import values for a long list of design variables?

    Category: Custom IC Design

    By kevch9988

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    updated over 8 years ago by Andrew Beckett

    2 replies • 15508 views
  • Discussion

    IC617 layout slow in VNC

    Category: Custom IC Design

    By drdanmc

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    updated over 8 years ago by Andrew Beckett

    1 replies • 14597 views
  • Discussion

    String variable as node name in mdl file?

    Category: Custom IC Design

    By ikara

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    started over 8 years ago

    0 replies • 13353 views
  • Discussion

    Nested equations in ADEL

    Category: Custom IC Design

    By CorradoN

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    updated over 8 years ago by drdanmc

    2 replies • 15059 views
  • Discussion

    Plot PM versus a swept parameter using parametric analysis

    Category: Custom IC Design

    By AmeliAmeli

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    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 13862 views
  • Discussion

    ADEXL parallel tests

    Category: Custom IC Design

    By manoharbn

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    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 14939 views
  • Discussion

    Pnoise analysis

    Category: Custom IC Design

    By Jithin

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    •

    updated over 8 years ago by Andrew Beckett

    8 replies • 22877 views
  • Discussion

    Invalid probe for a .measure statement where node also exist as port in one hierarchy above

    Category: Custom IC Design

    By roopakvasa

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    updated over 8 years ago by Andrew Beckett

    1 replies • 14009 views
  • Discussion

    LVS shows "StampErrorMult" error

    Category: Custom IC Design

    By Anklon

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    •

    updated over 8 years ago by Andrew Beckett

    1 replies • 5901 views
  • Discussion

    Simulation model for floating gate

    Category: Custom IC Design

    By farhan89

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    •

    updated over 8 years ago by paritoshs24

    1 replies • 14653 views
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