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Custom IC Design

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  • Discussion

    Fatal error found by spectre during topology check.

    Category: Custom IC Design

    By Aswathyn

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    updated over 3 years ago by Andrew Beckett

    9 replies • 14392 views
  • Discussion

    Monte Carlo: How to use different configs during calibration and simulation while keeping corner and mismatch information

    Category: Custom IC Design

    By ExcaIibur

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    updated over 3 years ago by JohnTweed

    1 replies • 9699 views
  • Discussion

    PSTB + PSS Analysis for dc-dc converter feedback loop stability

    Category: Custom IC Design

    By EhsanAfshari

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    •

    updated over 3 years ago by Frank Wiedmann

    1 replies • 11712 views
  • Discussion

    Plot Phase Noise of each sub-circuit from Calculator

    Category: Custom IC Design

    By Anjana Dissanayake

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    updated over 3 years ago by Andrew Beckett

    3 replies • 9878 views
  • Discussion

    Using functions in Assembler global variables

    Category: Custom IC Design

    By Brad RFeng

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    •

    updated over 3 years ago by Andrew Beckett

    5 replies • 12562 views
  • Discussion

    pin map error after pex analyse in calibre

    Category: Custom IC Design

    By marzi

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    •

    updated over 3 years ago by marzi

    2 replies • 10558 views
  • Discussion

    Re-run Unfinished/Error Points Problem

    Category: Custom IC Design

    By Kevin Buck

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 2475 views
  • Discussion

    Fluid Guard Ring porting can't show correct layer

    Category: Custom IC Design

    By Andy Su

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    •

    updated over 3 years ago by Andy Su

    2 replies • 3560 views
  • Discussion

    run multiple stb sim at the same time

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 10169 views
  • Discussion

    problem about hidding schematic in virtuoso

    Category: Custom IC Design

    By ppptt

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    •

    updated over 3 years ago by FormerMember

    1 replies • 8933 views
  • Discussion

    Cell copy problem with layout view in Cadence Virtuoso

    Category: Custom IC Design

    By Senan

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    •

    started over 3 years ago

    0 replies • 8778 views
  • Discussion

    How to use calculator in ADE Explorer

    Category: Custom IC Design

    By SpiceMonkey

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    •

    updated over 3 years ago by SpiceMonkey

    2 replies • 13866 views
  • Discussion

    LVS complaining about lower level hierarchal design

    Category: Custom IC Design

    By Senan

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    •

    started over 3 years ago

    0 replies • 8546 views
  • Discussion

    PVS requires pin Label to pass the LVS

    Category: Custom IC Design

    By Senan

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    •

    updated over 3 years ago by Senan

    2 replies • 10203 views
  • Discussion

    PDK automation system

    Category: Custom IC Design

    By hustyzw

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 9635 views
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