Custom IC Design

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Plotting from ADE Explorer (netl err)

Category: Custom IC Design

By Sepide

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updated over 3 years ago by Andrew Beckett

5 replies • 19003 views
Discussion

FFT of a signal

Category: Custom IC Design

By Firdos

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updated over 3 years ago by Firdos

5 replies • 20789 views
Discussion

Signal doesn't reach full swing (0 -> VDD) in post-layout spectre tran-simulation

Category: Custom IC Design

By iq79

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updated over 3 years ago by FormerMember

11 replies • 5864 views
Discussion

viaMap in streamout.

Category: Custom IC Design

By kenc184

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updated over 3 years ago by kenc184

2 replies • 10189 views
Discussion

MTS - how to use cells with identical library name but under different PDKs

Category: Custom IC Design

By hkhatri

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updated over 3 years ago by Andrew Beckett

1 replies • 942 views
Discussion

Layout of the technology cells are distorted

Category: Custom IC Design

By Rezara

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updated over 3 years ago by Rezara

2 replies • 9215 views
Discussion

Fatal error found by spectre during topology check.

Category: Custom IC Design

By Aswathyn

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updated over 3 years ago by Andrew Beckett

9 replies • 14670 views
Discussion

Monte Carlo: How to use different configs during calibration and simulation while keeping corner and mismatch information

Category: Custom IC Design

By ExcaIibur

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updated over 3 years ago by JohnTweed

1 replies • 9932 views
Discussion

PSTB + PSS Analysis for dc-dc converter feedback loop stability

Category: Custom IC Design

By EhsanAfshari

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updated over 3 years ago by Frank Wiedmann

1 replies • 11988 views
Discussion

Plot Phase Noise of each sub-circuit from Calculator

Category: Custom IC Design

By Anjana Dissanayake

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updated over 3 years ago by Andrew Beckett

3 replies • 10099 views
Discussion

Using functions in Assembler global variables

Category: Custom IC Design

By Brad RFeng

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updated over 3 years ago by Andrew Beckett

5 replies • 12869 views
Discussion

pin map error after pex analyse in calibre

Category: Custom IC Design

By marzi

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updated over 3 years ago by marzi

2 replies • 10800 views
Discussion

Re-run Unfinished/Error Points Problem

Category: Custom IC Design

By Kevin Buck

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updated over 3 years ago by Andrew Beckett

1 replies • 2542 views
Discussion

Fluid Guard Ring porting can't show correct layer

Category: Custom IC Design

By Andy Su

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updated over 3 years ago by Andy Su

2 replies • 3649 views
Discussion

run multiple stb sim at the same time

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by Andrew Beckett

1 replies • 10425 views

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