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Custom IC Design

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  • Discussion

    Neocell setup wizard?

    Category: Custom IC Design

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    updated over 18 years ago by archive

    6 replies • 15283 views
  • Discussion

    Tip of the week: Rapidly save sets of simulation data

    Category: Custom IC Design

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    started over 18 years ago

    0 replies • 12895 views
  • Discussion

    Error while netlisting in UltrasimVerilog

    Category: Custom IC Design

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    started over 18 years ago

    0 replies • 12710 views
  • Discussion

    SDL flow crash in 6.1?

    Category: Custom IC Design

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    updated over 18 years ago by archive

    1 replies • 13391 views
  • Discussion

    Error while running PLL Top simulations with Ultrasim

    Category: Custom IC Design

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    updated over 18 years ago by archive

    2 replies • 13430 views
  • Discussion

    Diva drcAntenna cumulative check

    Category: Custom IC Design

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    updated over 18 years ago by archive

    2 replies • 13342 views
  • Discussion

    Beat frequency in SpectreRF PSS simulation

    Category: Custom IC Design

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    updated over 18 years ago by archive

    2 replies • 21115 views
  • Discussion

    neocell

    Category: Custom IC Design

    By archive archive

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    updated over 18 years ago by archive

    2 replies • 13571 views
  • Discussion

    Using GTE in PAS 3.1 for generating PDKs?

    Category: Custom IC Design

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    started over 18 years ago

    0 replies • 14092 views
  • Discussion

    Impedance setting for ports in Spectre

    Category: Custom IC Design

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    updated over 18 years ago by archive

    4 replies • 17173 views
  • Discussion

    Cadence IC5.141 with NCSU design kit 1.2 or 1.5

    Category: Custom IC Design

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    updated over 18 years ago by archive

    2 replies • 13700 views
  • Discussion

    how does hiCreateInst work for pcells?

    Category: Custom IC Design

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    updated over 18 years ago by archive

    5 replies • 14152 views
  • Discussion

    leiHiCopy ?

    Category: Custom IC Design

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    updated over 18 years ago by archive

    2 replies • 13206 views
  • Discussion

    Error while extracting layout.

    Category: Custom IC Design

    By archive archive

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    updated over 18 years ago by archive

    5 replies • 14898 views
  • Discussion

    LVS and "selfmade" mosfet layout in VXL

    Category: Custom IC Design

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    updated over 18 years ago by archive

    2 replies • 7028 views
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