• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    about Nest limit in cadence virtuoso platform

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 15012 views
  • Discussion

    Ultrasim simulator Problem

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    12 replies • 19045 views
  • Discussion

    Suggestion required

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12509 views
  • Discussion

    Is there anybody who had this cadence cell opening problem?

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 12553 views
  • Discussion

    Diva Extract

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    6 replies • 15966 views
  • Discussion

    Events failure in Ultrasim simulator

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 12927 views
  • Discussion

    adding simulator views to a PDK

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 12972 views
  • Discussion

    Rapid IP3 on receiver lineups using PSS/PAC

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 1237 views
  • Discussion

    Tip of the Week: Scalable ideal 2-pole RLC filter

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 13014 views
  • Discussion

    Tip of the Week: Simple one-pin ideal voltage clamp

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 15724 views
  • Discussion

    dcmatch amalysis

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    1 replies • 14397 views
  • Discussion

    Tip of the Week: Using ADE calcutor for general purpose graphing

    Category: Custom IC Design

    By archive archive

    •

    started over 18 years ago

    0 replies • 17487 views
  • Discussion

    Error in sub-range ADC simulation.

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    3 replies • 15196 views
  • Discussion

    Netlist modifies itself

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    12 replies • 18946 views
  • Discussion

    AWD results plot/update causes spectre to slow to a crawl

    Category: Custom IC Design

    By archive archive

    •

    updated over 18 years ago by archive

    2 replies • 1457 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information