Custom IC Design

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Discussion

MTS - how to use cells with identical library name but under different PDKs

Category: Custom IC Design

By hkhatri

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updated over 3 years ago by Andrew Beckett

1 replies • 819 views
Discussion

Layout of the technology cells are distorted

Category: Custom IC Design

By Rezara

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updated over 3 years ago by Rezara

2 replies • 8347 views
Discussion

Fatal error found by spectre during topology check.

Category: Custom IC Design

By Aswathyn

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updated over 3 years ago by Andrew Beckett

9 replies • 13335 views
Discussion

Monte Carlo: How to use different configs during calibration and simulation while keeping corner and mismatch information

Category: Custom IC Design

By ExcaIibur

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updated over 3 years ago by JohnTweed

1 replies • 9042 views
Discussion

PSTB + PSS Analysis for dc-dc converter feedback loop stability

Category: Custom IC Design

By EhsanAfshari

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updated over 3 years ago by Frank Wiedmann

1 replies • 10891 views
Discussion

Plot Phase Noise of each sub-circuit from Calculator

Category: Custom IC Design

By Anjana Dissanayake

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updated over 3 years ago by Andrew Beckett

3 replies • 9132 views
Discussion

Using functions in Assembler global variables

Category: Custom IC Design

By Brad RFeng

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updated over 3 years ago by Andrew Beckett

5 replies • 11442 views
Discussion

pin map error after pex analyse in calibre

Category: Custom IC Design

By marzi

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updated over 3 years ago by marzi

2 replies • 9793 views
Discussion

Re-run Unfinished/Error Points Problem

Category: Custom IC Design

By Kevin Buck

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updated over 3 years ago by Andrew Beckett

1 replies • 2255 views
Discussion

Fluid Guard Ring porting can't show correct layer

Category: Custom IC Design

By Andy Su

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updated over 3 years ago by Andy Su

2 replies • 3250 views
Discussion

run multiple stb sim at the same time

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by Andrew Beckett

1 replies • 9333 views
Discussion

problem about hidding schematic in virtuoso

Category: Custom IC Design

By ppptt

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updated over 3 years ago by FormerMember

1 replies • 8272 views
Discussion

Cell copy problem with layout view in Cadence Virtuoso

Category: Custom IC Design

By Senan

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started over 3 years ago

0 replies • 8173 views
Discussion

How to use calculator in ADE Explorer

Category: Custom IC Design

By SpiceMonkey

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updated over 3 years ago by SpiceMonkey

2 replies • 12743 views
Discussion

LVS complaining about lower level hierarchal design

Category: Custom IC Design

By Senan

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started over 3 years ago

0 replies • 7958 views

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