Custom IC Design

Latest Posts

Discussion

Using a variable in mtline

Category: Custom IC Design

By BahaaRadi

$usertype
•
updated over 3 years ago by Andrew Beckett

1 replies • 9097 views
Discussion

ignore instance by layout extraction

Category: Custom IC Design

By Senan

$usertype
•
updated over 3 years ago by drdanmc

4 replies • 10962 views
Discussion

Back annotate the extracted parasatics from layout to schematic

Category: Custom IC Design

By Senan

$usertype
•
updated over 3 years ago by Senan

2 replies • 10883 views
Discussion

Simulation(AMS simulator) stop when results are appended or reloaded in results browser.

Category: Custom IC Design

By Pooohang1995

$usertype
•
updated over 3 years ago by Andrew Beckett

2 replies • 2111 views
Discussion

Error Quantus PVS Extraction

Category: Custom IC Design

By amrao

$usertype
•
updated over 3 years ago by Andrew Beckett

3 replies • 11481 views
Discussion

ADE output calculation from other expression not working

Category: Custom IC Design

By Jin W Kwak

$usertype
•
updated over 3 years ago by Andrew Beckett

5 replies • 11808 views
Discussion

ocean measure success stories or guide?

Category: Custom IC Design

By drdanmc

$usertype
•
started over 3 years ago

0 replies • 8614 views
Discussion

Exporting several DC sweeps (OP transistor params) to CSV in an organized way

Category: Custom IC Design

By rod1

$usertype
•
updated over 3 years ago by FormerMember

4 replies • 12260 views
Discussion

Trim Methodology in Maestro Assembler. The trim value is out of range and the cross() function returns no value. How can I get the trim value as "min" or "max"

Category: Custom IC Design

By IceTea

$usertype
•
updated over 3 years ago by IceTea

5 replies • 4266 views
Discussion

VXL and inherited connections?z

Category: Custom IC Design

By kenc184

$usertype
•
updated over 3 years ago by kenc184

1 replies • 1284 views
Discussion

Suppression of vias not required in VXL?

Category: Custom IC Design

By kenc184

$usertype
•
updated over 3 years ago by kenc184

2 replies • 9036 views
Discussion

Location of VXL user guide please

Category: Custom IC Design

By kenc184

$usertype
•
updated over 3 years ago by kenc184

2 replies • 10881 views
Discussion

is there a way to change the design for multiple tests simultaneously?

Category: Custom IC Design

By delgsy

$usertype
•
updated over 3 years ago by delgsy

2 replies • 9462 views
Discussion

License issue while plotting outputs

Category: Custom IC Design

By Hao Guo

$usertype
•
updated over 3 years ago by Hao Guo

5 replies • 10478 views
Discussion

tags in VXL layout

Category: Custom IC Design

By kenc184

$usertype
•
updated over 3 years ago by kenc184

2 replies • 6457 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.