Custom IC Design

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Discussion

sideband in PNOISE vs harmonic in PSS

Category: Custom IC Design

By StanleyChe
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updated over 1 year ago by StanleyChe

12 replies • 9638 views
Discussion

environment variable for "optimize single point run" in job policy netlisting

Category: Custom IC Design

By sjwprcker
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updated over 1 year ago by Andrew Beckett

1 replies • 1451 views
Discussion

ADE/maestro: Define sweep for variables elegantly like we can do for parameters

Category: Custom IC Design

By StephanWeber
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updated over 1 year ago by Andrew Beckett

1 replies • 1162 views
Discussion

How to remove label in layot

Category: Custom IC Design

By VIRAJ PANCHAL
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updated over 1 year ago by VIRAJ PANCHAL

2 replies • 5745 views
Discussion

Import several pwl signals through one file? (need an real example)

Category: Custom IC Design

By Chungtest
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started over 1 year ago

0 replies • 4308 views
Discussion

Input referred sampled pnoise

Category: Custom IC Design

By Matthew Love
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updated over 1 year ago by ShawnLogan

3 replies • 5681 views
Discussion

Error using cds_innersrr

Category: Custom IC Design

By elic253
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updated over 1 year ago by elic253

4 replies • 5531 views
Discussion

[Solved]Cannot open layout view due to stuck at "tsmcCdfFormInitCB"

Category: Custom IC Design

By yuh wang
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started over 1 year ago

0 replies • 1397 views
Discussion

Change default plot setting (log-scale & line plot)

Category: Custom IC Design

By ashwinrs
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updated over 1 year ago by Andrew Beckett

1 replies • 1810 views
Discussion

simulations which ran after maestro's check out are getting removed from history when canceling the check out

Category: Custom IC Design

By analog2
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updated over 1 year ago by analog2

2 replies • 1490 views
Discussion

How can I get Verilog-A code of RPI poly-Si TFT model?

Category: Custom IC Design

By Dannny97
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updated over 1 year ago by Andrew Beckett

1 replies • 5010 views
Discussion

Monte Carlo in parametric analysis.

Category: Custom IC Design

By Euller Lucas
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updated over 1 year ago by Euller Lucas

2 replies • 4987 views
Discussion

Glitch

Category: Custom IC Design

By VIRAJ PANCHAL
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updated over 1 year ago by VIRAJ PANCHAL

3 replies • 6279 views
Discussion

ADE Assembler: automatic ADC gain error extraction

Category: Custom IC Design

By NewScreenName
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updated over 1 year ago by Andrew Beckett

11 replies • 9376 views
Discussion

LVS mismatch when transistor body is not detached/integrated

Category: Custom IC Design

By supriyo1985
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updated over 1 year ago by supriyo1985

1 replies • 1550 views

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