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Custom IC Design

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  • Discussion

    conflict between schematic_pin view and symbol view

    Category: Custom IC Design

    By sidm

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    updated over 4 years ago by sidm

    4 replies • 11710 views
  • Discussion

    Ohm My God!

    Category: Custom IC Design

    By CADcasualty

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    •

    updated over 4 years ago by CADcasualty

    4 replies • 11254 views
  • Discussion

    sample count

    Category: Custom IC Design

    By abdurrahman0234

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    •

    updated over 4 years ago by abdurrahman0234

    15 replies • 14592 views
  • Discussion

    How to backannotate Monte-Carlo DCOP simulation results to schematic

    Category: Custom IC Design

    By eivan

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    •

    updated over 4 years ago by eivan

    2 replies • 10906 views
  • Discussion

    generating DC files for inter-dependent Tests in ADEXL

    Category: Custom IC Design

    By Niccolo Lacaita

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    •

    started over 4 years ago

    0 replies • 9812 views
  • Discussion

    problem with strobe period

    Category: Custom IC Design

    By Medya

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    •

    updated over 4 years ago by Andrew Beckett

    5 replies • 20538 views
  • Discussion

    convert selected signed out signal to unsigned

    Category: Custom IC Design

    By abdurrahman0234

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    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 11279 views
  • Discussion

    ViVa is plotting old simulation result instead of the current simulation results

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 4 years ago by JainN

    4 replies • 12014 views
  • Discussion

    2-stage CMOS OTA: LVS errors

    Category: Custom IC Design

    By Jose Sarmento

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    •

    updated over 4 years ago by Jose Sarmento

    1 replies • 10728 views
  • Discussion

    SOLVED - Problem to avoid the removal of some capacitors with low values with Spectre XPS tool while performing transient analysis

    Category: Custom IC Design

    By VitorLima

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    •

    updated over 4 years ago by MaximX

    3 replies • 1686 views
  • Discussion

    Backup and reload results in Assembler

    Category: Custom IC Design

    By shadiyoussef

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    •

    updated over 4 years ago by shadiyoussef

    4 replies • 13330 views
  • Discussion

    Sine wave amplitude-modulated by a ramp for transient simulation

    Category: Custom IC Design

    By maaz2020

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    •

    updated over 4 years ago by maaz2020

    2 replies • 14504 views
  • Discussion

    Swap Activity Warning: Excessive swap activity

    Category: Custom IC Design

    By RavitejKammari

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    •

    updated over 4 years ago by Andrew Beckett

    1 replies • 16570 views
  • Discussion

    Question about exporting simulation results to csv format, with ocean script

    Category: Custom IC Design

    By dskang

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    updated over 4 years ago by dskang

    8 replies • 17311 views
  • Discussion

    FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit

    Category: Custom IC Design

    By bikram94

    $usertype

    •

    updated over 4 years ago by bikram94

    2 replies • 14103 views
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