Custom IC Design

Latest Posts

Discussion

PAE Contours

Category: Custom IC Design

By illaoi

$usertype
•
started over 2 years ago

0 replies • 6408 views
Discussion

Unexpected error message in Assembler on opening design

Category: Custom IC Design

By StephanWeber

$usertype
•
updated over 2 years ago by Andrew Beckett

3 replies • 6624 views
Discussion

Probing wreal4state nets deep in hierarchy adds IE/connectLib element

Category: Custom IC Design

By MikeVP

$usertype
•
updated over 2 years ago by MikeVP

1 replies • 1740 views
Discussion

Engineering

Category: Custom IC Design

By MAXWELL2726

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 6310 views
Discussion

device checking setup issues

Category: Custom IC Design

By SpiceMonkey

$usertype
•
updated over 2 years ago by SpiceMonkey

1 replies • 8001 views
Discussion

passing a string type parameter to veriloga through schematic based design

Category: Custom IC Design

By ZJWDJ

$usertype
•
updated over 2 years ago by ZJWDJ

2 replies • 8065 views
Discussion

Run/Plot Single Transient Simulation Multiple Times

Category: Custom IC Design

By CRTejaswi

$usertype
•
updated over 2 years ago by Andrew Beckett

4 replies • 2502 views
Discussion

MC test dependent on pass/fail of previous MC test

Category: Custom IC Design

By TempViator

$usertype
•
updated over 2 years ago by ShawnLogan

5 replies • 2460 views
Discussion

How can I use a schematic parameter (such as R1/r = 10K) in an Explorer calculation?

Category: Custom IC Design

By Bret Howe

$usertype
•
updated over 2 years ago by Andrew Beckett

7 replies • 3973 views
Discussion

Spectre X fails to output accurate nutascii formated .raw output file if +postlpreset is used

Category: Custom IC Design

By Daedalus

$usertype
•
updated over 2 years ago by Andrew Beckett

4 replies • 8271 views
Discussion

How to Create new cell view under specific category

Category: Custom IC Design

By Young2020

$usertype
•
updated over 2 years ago by Andrew Beckett

4 replies • 7520 views
Discussion

Using time of an assert event in ADE Assembler's output expressions

Category: Custom IC Design

By Zol

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 1962 views
Discussion

How can I change the virtuoso editor for read-only text files?

Category: Custom IC Design

By BillH314

$usertype
•
updated over 2 years ago by Frank Wiedmann

1 replies • 8239 views
Discussion

modify PCell parameter due to skill code

Category: Custom IC Design

By AutoJeff

$usertype
•
updated over 2 years ago by AutoJeff

8 replies • 8750 views
Discussion

Disabled Reliability Report in Reliability Analysis RAK

Category: Custom IC Design

By AllesNormell

$usertype
•
started over 2 years ago

0 replies • 6231 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.