Custom IC Design

Latest Posts

Discussion

Set the sequence of multiple tests (ADE Assembler)

Category: Custom IC Design

By NeoTED
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updated over 1 year ago by Frank Wiedmann

1 replies • 4659 views
Discussion

Streaming GDSII files

Category: Custom IC Design

By PrzemDictador
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started over 1 year ago

0 replies • 4997 views
Discussion

Using custom variables in IE cards

Category: Custom IC Design

By djg42085
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started over 1 year ago

0 replies • 4375 views
Discussion

About PLL phase noise simulation (pss+pnoise or hb+hbnoise?)

Category: Custom IC Design

By MOS
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updated over 1 year ago by MOS

8 replies • 6741 views
Discussion

Symbol 'patch' in lib 'basic' may lead to different LVS results in different IC suites?

Category: Custom IC Design

By LiQY20
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updated over 1 year ago by LiQY20

2 replies • 2190 views
Discussion

Pulse source for unequal duty cycle

Category: Custom IC Design

By BitanMallik
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updated over 1 year ago by BitanMallik

2 replies • 4566 views
Discussion

How to auto-place standard cells using its own prBoundary?

Category: Custom IC Design

By RuihW
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updated over 1 year ago by Andrew Beckett

1 replies • 5577 views
Discussion

How do I change the name and unit of the X-axis in “plot across design points”

Category: Custom IC Design

By wangyunxin
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updated over 1 year ago by Andrew Beckett

1 replies • 5492 views
Discussion

How do Maestro and caculator average the waveform of a digital signal

Category: Custom IC Design

By wangyunxin
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updated over 1 year ago by wangyunxin

1 replies • 4574 views
Discussion

How to automatically find the final x-value of a waveform to be used by the integ() function

Category: Custom IC Design

By DomiHammerfall
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updated over 1 year ago by Andrew Beckett

3 replies • 4884 views
Discussion

Equation Syntax

Category: Custom IC Design

By Maria98
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updated over 1 year ago by Maria98

2 replies • 4582 views
Discussion

maestro Waveform renaming

Category: Custom IC Design

By wangyunxin
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updated over 1 year ago by Andrew Beckett

1 replies • 4564 views
Discussion

Error Layer window not appear although there is DRC error

Category: Custom IC Design

By SARAP
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updated over 1 year ago by Andrew Beckett

1 replies • 4777 views
Discussion

Ocean Post Processing on a sweep

Category: Custom IC Design

By david73
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updated over 1 year ago by Andrew Beckett

1 replies • 4549 views
Discussion

TLIN (ADS) equivalent model in CADENCE VIRTUOSO

Category: Custom IC Design

By Maria98
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updated over 1 year ago by ShawnLogan

2 replies • 5231 views

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