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Custom IC Design

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  • Discussion

    ignore instance by layout extraction

    Category: Custom IC Design

    By Senan

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    updated over 3 years ago by drdanmc

    4 replies • 10957 views
  • Discussion

    Back annotate the extracted parasatics from layout to schematic

    Category: Custom IC Design

    By Senan

    $usertype

    •

    updated over 3 years ago by Senan

    2 replies • 10876 views
  • Discussion

    Simulation(AMS simulator) stop when results are appended or reloaded in results browser.

    Category: Custom IC Design

    By Pooohang1995

    $usertype

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    updated over 3 years ago by Andrew Beckett

    2 replies • 2110 views
  • Discussion

    Error Quantus PVS Extraction

    Category: Custom IC Design

    By amrao

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    3 replies • 11472 views
  • Discussion

    ADE output calculation from other expression not working

    Category: Custom IC Design

    By Jin W Kwak

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    5 replies • 11800 views
  • Discussion

    ocean measure success stories or guide?

    Category: Custom IC Design

    By drdanmc

    $usertype

    •

    started over 3 years ago

    0 replies • 8609 views
  • Discussion

    Exporting several DC sweeps (OP transistor params) to CSV in an organized way

    Category: Custom IC Design

    By rod1

    $usertype

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    updated over 3 years ago by FormerMember

    4 replies • 12248 views
  • Discussion

    Trim Methodology in Maestro Assembler. The trim value is out of range and the cross() function returns no value. How can I get the trim value as "min" or "max"

    Category: Custom IC Design

    By IceTea

    $usertype

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    updated over 3 years ago by IceTea

    5 replies • 4259 views
  • Discussion

    VXL and inherited connections?z

    Category: Custom IC Design

    By kenc184

    $usertype

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    updated over 3 years ago by kenc184

    1 replies • 1283 views
  • Discussion

    Suppression of vias not required in VXL?

    Category: Custom IC Design

    By kenc184

    $usertype

    •

    updated over 3 years ago by kenc184

    2 replies • 9031 views
  • Discussion

    Location of VXL user guide please

    Category: Custom IC Design

    By kenc184

    $usertype

    •

    updated over 3 years ago by kenc184

    2 replies • 10874 views
  • Discussion

    is there a way to change the design for multiple tests simultaneously?

    Category: Custom IC Design

    By delgsy

    $usertype

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    updated over 3 years ago by delgsy

    2 replies • 9456 views
  • Discussion

    License issue while plotting outputs

    Category: Custom IC Design

    By Hao Guo

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    •

    updated over 3 years ago by Hao Guo

    5 replies • 10469 views
  • Discussion

    tags in VXL layout

    Category: Custom IC Design

    By kenc184

    $usertype

    •

    updated over 3 years ago by kenc184

    2 replies • 6457 views
  • Discussion

    Simulation of encrypted spectre netlist

    Category: Custom IC Design

    By analogdesign

    $usertype

    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 10295 views
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