Custom IC Design

Latest Posts

Discussion

ADE-XL extension using OCEAN-XL

Category: Custom IC Design

By KGh94

$usertype
•
updated over 7 years ago by KGh94

4 replies • 14769 views
Discussion

ADE XL remains in "pending" state

Category: Custom IC Design

By david0526

$usertype
•
updated over 7 years ago by Andrew Beckett

4 replies • 6465 views
Discussion

VLS-XL Assign instance pin to net - automatically create net on clicked target?

Category: Custom IC Design

By caver456

$usertype
•
updated over 7 years ago by caver456

4 replies • 3881 views
Discussion

Virtuoso XL: how to remove instance pin from net?

Category: Custom IC Design

By caver456

$usertype
•
updated over 7 years ago by caver456

3 replies • 18167 views
Discussion

Cadence ADE L can't simulate output for longer simulation time.

Category: Custom IC Design

By Anklon

$usertype
•
updated over 7 years ago by Marc Heise

3 replies • 3099 views
Discussion

LVS mismatch

Category: Custom IC Design

By myjan

$usertype
•
updated over 7 years ago by Marc Heise

1 replies • 19304 views
Discussion

Abstract generation : Warning : Design contain zero-pin terminal.

Category: Custom IC Design

By Anklon

$usertype
•
updated over 7 years ago by Marc Heise

1 replies • 14040 views
Discussion

spectre: subcktprobelvl and the reliability of Monte-Carlo results

Category: Custom IC Design

By miwe

$usertype
•
updated over 7 years ago by miwe

2 replies • 14610 views
Discussion

Create a simple abstract view from layout

Category: Custom IC Design

By RVERP

$usertype
•
updated over 7 years ago by Marc Heise

1 replies • 16102 views
Discussion

Virtuoso crashing on executing mgc_rve_load_setup_file command for big layouts

Category: Custom IC Design

By anandmohan

$usertype
•
updated over 7 years ago by Marc Heise

1 replies • 13331 views
Discussion

Auto PR Boundary Alignment in Custom Layout

Category: Custom IC Design

By kmshah93

$usertype
•
updated over 7 years ago by Marc Heise

1 replies • 14963 views
Discussion

Node capacitance difference between captab and AC analysis

Category: Custom IC Design

By ernie123

$usertype
•
started over 7 years ago

0 replies • 15515 views
Discussion

gmoverid in dc operating point is not equal to gm/id

Category: Custom IC Design

By rfham

$usertype
•
updated over 7 years ago by mschw

4 replies • 5525 views
Discussion

How to determine Scaled-sigma sampling (SSS) Number in high-yield estimation (HYE) for SRAM design? Thanks

Category: Custom IC Design

By Tina Zhao

$usertype
•
updated over 7 years ago by Tina Zhao

6 replies • 16089 views
Discussion

change instance name in schematic

Category: Custom IC Design

By SteveRFIC

$usertype
•
updated over 7 years ago by SteveRFIC

4 replies • 21592 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.