Custom IC Design

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*Error* eval: undefined function - mgc_calibre_run_drc

Category: Custom IC Design

By Saumeek
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updated over 1 year ago by Andrew Beckett

2 replies • 1094 views
Discussion

Finding the training material of the "integration innovus with virtuoso"

Category: Custom IC Design

By SimbaG
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updated over 1 year ago by Frank Wiedmann

1 replies • 1118 views
Discussion

PCells not found for layout in Cadence Virtuoso using GF 12nm PDK

Category: Custom IC Design

By Saumeek
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updated over 1 year ago by Andrew Beckett

1 replies • 4117 views
Discussion

expand combined libraries to tree view on start in LibraryManager

Category: Custom IC Design

By cato
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updated over 1 year ago by cato

2 replies • 3489 views
Discussion

Why the electromagnetic solver not found?

Category: Custom IC Design

By Restart
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updated over 1 year ago by Restart

1 replies • 3452 views
Discussion

Mixer Stability

Category: Custom IC Design

By TobyK
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started over 1 year ago

0 replies • 3251 views
Discussion

How to set the stress conditions in a reliability analysis in ADE explorer?

Category: Custom IC Design

By unSkilled
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updated over 1 year ago by JankoK

1 replies • 3894 views
Discussion

Library Manager - open terminal option on right clicking any cell or views

Category: Custom IC Design

By firebolt3
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updated over 1 year ago by firebolt3

4 replies • 1907 views
Discussion

The so called "Virtuoso Layout Suite EXL"

Category: Custom IC Design

By Restart
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updated over 1 year ago by Restart

8 replies • 3504 views
Discussion

output file i.e. tran.tran.tran as different name

Category: Custom IC Design

By Kashfi
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updated over 1 year ago by Kashfi

2 replies • 3694 views
Discussion

Extract the list of devices used in the layout

Category: Custom IC Design

By Vishesh Gupta
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updated over 1 year ago by Vishesh Gupta

2 replies • 3721 views
Discussion

Meaning of 1v in pmos_1v in gpdk045 library

Category: Custom IC Design

By APM
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updated over 1 year ago by APM

3 replies • 4116 views
Discussion

Gate Operator Control Panel

Category: Custom IC Design

By shyam Bharvad
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updated over 1 year ago by Andrew Beckett

1 replies • 3305 views
Discussion

Fetching the operating point of a transistor in VerilogA with "$simprobe" always returns 0

Category: Custom IC Design

By CroAndro
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updated over 1 year ago by CroAndro

2 replies • 961 views
Discussion

Inherited terminal

Category: Custom IC Design

By Vishesh Gupta
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updated over 1 year ago by Vishesh Gupta

4 replies • 5597 views

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