Custom IC Design

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Discussion

Error when try to use ADE simulator to initialize

Category: Custom IC Design

By Ning08

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updated over 6 years ago by Andrew Beckett

3 replies • 16331 views
Discussion

Layout problem when trying to see layers

Category: Custom IC Design

By abdoboua

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updated over 6 years ago by Andrew Beckett

1 replies • 13527 views
Discussion

How can i enable annotations in virtuoso?

Category: Custom IC Design

By Genas

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updated over 6 years ago by Andrew Beckett

3 replies • 14793 views
Discussion

Annotation not working even after selecting the cdsparams

Category: Custom IC Design

By Genas

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updated over 6 years ago by Andrew Beckett

1 replies • 14229 views
Discussion

Creating a symbol view from the source code pointed by SimVision

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

1 replies • 13433 views
Discussion

Dynamic glitch check - on bus + variable level definition

Category: Custom IC Design

By sgserg

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updated over 6 years ago by Andrew Beckett

1 replies • 1096 views
Discussion

How to check the DC operating condition of a MOS in extracted netlist simulation

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

1 replies • 13436 views
Discussion

Virtuoso flatten verilog netlist generation question

Category: Custom IC Design

By Joonsoo

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updated over 6 years ago by Andrew Beckett

3 replies • 15756 views
Discussion

tie jitter function

Category: Custom IC Design

By Karev11

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updated over 6 years ago by Andrew Beckett

1 replies • 14075 views
Discussion

Full chip transistor level simulation convergence problem

Category: Custom IC Design

By Zhao Hui

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updated over 6 years ago by Andrew Beckett

1 replies • 13501 views
Discussion

Cadence crashes every time I change a wave's color

Category: Custom IC Design

By Kyle W

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updated over 6 years ago by Andrew Beckett

5 replies • 1701 views
Discussion

display result from on-going simulation

Category: Custom IC Design

By Karev11

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updated over 6 years ago by Karev11

2 replies • 13549 views
Discussion

Voltus-Fi vpserro layers display

Category: Custom IC Design

By ArturS

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updated over 6 years ago by Andrew Beckett

1 replies • 5447 views
Discussion

deepprobe for pex (spf) view

Category: Custom IC Design

By skamlesh

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started over 6 years ago

0 replies • 13932 views
Discussion

how to short circuit in layout for analogLib\iPRB kind behavioural cell

Category: Custom IC Design

By DavidLou

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updated over 6 years ago by Andrew Beckett

4 replies • 2689 views

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