Custom IC Design

Latest Posts

Discussion

How to control "isnoisy" property for analogLib's "switch" component?

Category: Custom IC Design

By dontpanic

$usertype
•
updated over 4 years ago by dontpanic

8 replies • 5818 views
Discussion

Error: Failed to elaborate("Library Name" "Cell Name" "config")

Category: Custom IC Design

By Casp

$usertype
•
updated over 4 years ago by VictorWu

12 replies • 6226 views
Discussion

Spectre S-parameter analysis port definition

Category: Custom IC Design

By raduionescu

$usertype
•
updated over 4 years ago by raduionescu

4 replies • 13955 views
Discussion

180nm Calibre PEX error，especially Calview setup error

Category: Custom IC Design

By VictorWu

$usertype
•
updated over 4 years ago by MaximX

5 replies • 4275 views
Discussion

Case statements in Design Variables and AMS UNL

Category: Custom IC Design

By jehh

$usertype
•
updated over 4 years ago by jehh

6 replies • 14200 views
Discussion

How to fix a corrupted schematic

Category: Custom IC Design

By jorgevdelacruzN

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 12516 views
Discussion

Configure outputstart in tstab

Category: Custom IC Design

By ErickelRojo

$usertype
•
updated over 4 years ago by FormerMember

7 replies • 13741 views
Discussion

Inheriting verilogams parameters not inheriting from ADE

Category: Custom IC Design

By NickA

$usertype
•
started over 4 years ago

0 replies • 10680 views
Discussion

View values of process parameters for every Monte Carlo sample

Category: Custom IC Design

By soph

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 13266 views
Discussion

Extremely slow layout viewing performance while moving objects

Category: Custom IC Design

By BakBeh

$usertype
•
updated over 4 years ago by BakBeh

2 replies • 12418 views
Discussion

How to include a randon noise source in tran simulation ?.

Category: Custom IC Design

By alexsunny123

$usertype
•
updated over 4 years ago by Frank Wiedmann

1 replies • 11576 views
Discussion

creating an updated spice model of BSIM4 component

Category: Custom IC Design

By robert 21

$usertype
•
updated over 4 years ago by Andrew Beckett

1 replies • 10782 views
Discussion

Does Spice-In also generate Symbol view for schematic subcells?

Category: Custom IC Design

By SPOR

$usertype
•
started over 4 years ago

0 replies • 10648 views
Discussion

Plot voltage waveform at gate of transistor -RC extraction-.spf file

Category: Custom IC Design

By Hmjafari

$usertype
•
updated over 4 years ago by Hmjafari

13 replies • 6070 views
Discussion

Undefined function or variable 'cds_innersrr'.

Category: Custom IC Design

By findsriharsha

$usertype
•
updated over 4 years ago by Andrew Beckett

4 replies • 3923 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.