Custom IC Design

Latest Posts

Discussion

ADE option compatible spice2 in IC6.1.7

Category: Custom IC Design

By AndreyVolk

$usertype
•
updated over 7 years ago by AndreyVolk

5 replies • 6581 views
Discussion

Importing PSPICE or TI models into Cadence Virtuoso

Category: Custom IC Design

By Raffaele Aaron

$usertype
•
updated over 7 years ago by Raffaele Aaron

2 replies • 23005 views
Discussion

Transient Noise Simulation in Spectre

Category: Custom IC Design

By SwatiSingh

$usertype
•
updated over 7 years ago by Karel Z

6 replies • 20857 views
Discussion

How can you change the waveform viewer defaults to thicker lines and not dotted?

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 7 years ago by CADcasualty

6 replies • 19752 views
Discussion

Is there any way to add a new empty strip on ViVa?

Category: Custom IC Design

By BaaB

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 14048 views
Discussion

What's the difference between 'all' and 'allpub' in the save options form of ADE L?

Category: Custom IC Design

By Cambridge Lv

$usertype
•
updated over 7 years ago by Cambridge Lv

2 replies • 8535 views
Discussion

Suggestions for practical ADE Assembler test setup for corner-specific cellviews?

Category: Custom IC Design

By hchan

$usertype
•
updated over 7 years ago by hchan

4 replies • 14557 views
Discussion

Cascaded display.drf loading

Category: Custom IC Design

By CADcasualty

$usertype
•
updated over 7 years ago by Andrew Beckett

6 replies • 25383 views
Discussion

how to run skill script from csh

Category: Custom IC Design

By qkoyote

$usertype
•
updated over 7 years ago by qkoyote

3 replies • 15586 views
Discussion

Post-simulation error

Category: Custom IC Design

By tahm

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 14964 views
Discussion

How to use a component (VerilogA) within a .scs model file to drive output signals

Category: Custom IC Design

By MT13

$usertype
•
updated over 7 years ago by MT13

7 replies • 17481 views
Discussion

ERROR (SFE-23): "input.scs" 19: X0 is an instance of an undefined model f_opAmp.

Category: Custom IC Design

By Jaisal

$usertype
•
updated over 7 years ago by Nicolas Callens

1 replies • 2665 views
Discussion

Filter Layout pins from LVS

Category: Custom IC Design

By PietroUser

$usertype
•
updated over 7 years ago by Andrew Beckett

3 replies • 13898 views
Discussion

Will different save options cause different Spectre simulation time?

Category: Custom IC Design

By Cambridge Lv

$usertype
•
updated over 7 years ago by Cambridge Lv

2 replies • 1208 views
Discussion

how to enforce identical MC mismatch variation on sub circuit used for calibration as those applied on the main test bench

Category: Custom IC Design

By HansB

$usertype
•
updated over 7 years ago by HansB

2 replies • 13558 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.