Custom IC Design

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Discussion

ADE L | post-layout simulation | input.scs error

Category: Custom IC Design

By Rbaca
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updated over 15 years ago by Quek

4 replies • 13972 views
Discussion

ADE-L asking for license when using "schematic menus"

Category: Custom IC Design

By tkhan
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updated over 15 years ago by tkhan

7 replies • 2407 views
Discussion

ultrasim partitioning error, can I decalre bias node as voltage regulator output?

Category: Custom IC Design

By huber
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updated over 15 years ago by Andre Baguenie

2 replies • 13498 views
Discussion

autosave option in 6.1.3 version

Category: Custom IC Design

By shushan
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updated over 15 years ago by chlascrew

7 replies • 15814 views
Discussion

spectre RF pss sweep error

Category: Custom IC Design

By kivvzhou
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updated over 15 years ago by Andrew Beckett

4 replies • 14785 views
Discussion

ASSURA LVS errors

Category: Custom IC Design

By Dennis Faber
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updated over 15 years ago by Quek

3 replies • 14552 views
Discussion

Operating region

Category: Custom IC Design

By jugemu1234
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updated over 15 years ago by Dennis Faber

4 replies • 73590 views
Discussion

extract specified layout net 5141 (Assura & pvs)

Category: Custom IC Design

By stuso
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updated over 15 years ago by Andrew Beckett

3 replies • 1641 views
Discussion

Ultrasim partitioning guidelines

Category: Custom IC Design

By paulaos
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started over 15 years ago

0 replies • 12795 views
Discussion

Plotting pole/zero results

Category: Custom IC Design

By Grover
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updated over 15 years ago by Andrew Beckett

7 replies • 8422 views
Discussion

Set Context / Calibre RVE?

Category: Custom IC Design

By PolygonSlinger
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updated over 15 years ago by kbhow

2 replies • 16087 views
Discussion

comparission of two GDS

Category: Custom IC Design

By sailesh
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updated over 15 years ago by stuso

5 replies • 18298 views
Discussion

Like to extract Some layout nets new layout (new Cell)

Category: Custom IC Design

By Satya
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updated over 15 years ago by Quek

6 replies • 14925 views
Discussion

Layer grouping in Techfile and acess it through Skill

Category: Custom IC Design

By Satya
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updated over 15 years ago by Andrew Beckett

3 replies • 13900 views
Discussion

vdd not sensed in post-layout simulation

Category: Custom IC Design

By Malolo
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updated over 15 years ago by Andrew Beckett

1 replies • 13595 views

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