Custom IC Design

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Discussion

Netlist schematic to Verilog: Preserve "var real" port type across entire netlist

Category: Custom IC Design

By jyang4

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started over 10 years ago

0 replies • 1360 views
Discussion

Virtuoso Layout Editor net highlighting

Category: Custom IC Design

By apple419

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updated over 10 years ago by apple419

2 replies • 16957 views
Discussion

test vector creation for ATE

Category: Custom IC Design

By apple419

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updated over 10 years ago by apple419

4 replies • 18064 views
Discussion

Abstract Generator: Terminals not accessible, off-grid pins

Category: Custom IC Design

By marten

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updated over 10 years ago by marten

1 replies • 15573 views
Discussion

middle-of-line (MOL) layers

Category: Custom IC Design

By vishnu4830

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updated over 10 years ago by Andrew Beckett

1 replies • 14354 views
Discussion

Exporting values of resistances and currents to a text file

Category: Custom IC Design

By rafaelon

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updated over 10 years ago by Andrew Beckett

1 replies • 13972 views
Discussion

Setting snap grid spacings

Category: Custom IC Design

By J Wilwert

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updated over 10 years ago by Andrew Beckett

6 replies • 23627 views
Discussion

IC61x vs ICADV12x

Category: Custom IC Design

By aceduke

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updated over 10 years ago by Andrew Beckett

1 replies • 15558 views
Discussion

Incorrect device parameters (as, ad, ps, pd) extracted by calibre PEX

Category: Custom IC Design

By ntang

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updated over 10 years ago by Andrew Beckett

1 replies • 15304 views
Discussion

diva extract set switches error

Category: Custom IC Design

By sdineshkumar

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updated over 10 years ago by Andrew Beckett

6 replies • 17576 views
Discussion

Problem after cdb2oa translation

Category: Custom IC Design

By DevB

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updated over 10 years ago by DevB

1 replies • 14143 views
Discussion

Verilog-A transition filter warning from spectre

Category: Custom IC Design

By CTDSM

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updated over 10 years ago by Andrew Beckett

1 replies • 16602 views
Discussion

Problem with Calibre LVS_ IC6

Category: Custom IC Design

By tahm

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updated over 10 years ago by Andrew Beckett

1 replies • 3481 views
Discussion

Voltage out to next stage- cadence and verilogA

Category: Custom IC Design

By Nishtha Sharma

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started over 10 years ago

0 replies • 543 views
Discussion

spectre error (64bit/32bit) on linux

Category: Custom IC Design

By Karev11

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updated over 10 years ago by Andrew Beckett

3 replies • 4948 views

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