Custom IC Design

Latest Posts

Discussion

How to Automatically Print Design Checks/Asserts in Simulation in Virtuoso Assembler by Default

Category: Custom IC Design

By baltaci

$usertype
•
updated over 1 year ago by baltaci

2 replies • 876 views
Discussion

Space key not working in virtuoso layout

Category: Custom IC Design

By kalikrishna

$usertype
•
updated over 1 year ago by Andrew Beckett

1 replies • 2838 views
Discussion

Maestro - Intersymbol Interference (ISI) Jitter measurement

Category: Custom IC Design

By firebolt3

$usertype
•
updated over 1 year ago by Andrew Beckett

2 replies • 893 views
Discussion

Viva XL can only display waveform of the first run of a spectremdl sweep

Category: Custom IC Design

By NightOwlPoppy

$usertype
•
updated over 1 year ago by NightOwlPoppy

4 replies • 3927 views
Discussion

Capacitor Shown with Red 'X' in Layout for TSMC65 pdk

Category: Custom IC Design

By SM20240729856

$usertype
•
updated over 1 year ago by SM20240729856

2 replies • 1124 views
Discussion

Behavioral modeling of clock gating for efficient analog simulations (Spectre)

Category: Custom IC Design

By ItsMichael

$usertype
•
updated over 1 year ago by Alonso Schmidt

1 replies • 3091 views
Discussion

Migration to new operating system and force compiled model recompile

Category: Custom IC Design

By JayBee

$usertype
•
updated over 1 year ago by TomasMelander

7 replies • 5356 views
Discussion

Move Metal offgrid back on grid

Category: Custom IC Design

By TobyK

$usertype
•
updated over 1 year ago by RobMan

1 replies • 2828 views
Discussion

Some error while running Quantus(Assura) Parasitc extraction run form

Category: Custom IC Design

By Sameerpy

$usertype
•
started over 1 year ago

0 replies • 658 views
Discussion

How can I simulate based on the random mismatch generated by a previous Monte Carlo iteration?

Category: Custom IC Design

By AW202410094823

$usertype
•
updated over 1 year ago by AW202410094823

2 replies • 3016 views
Discussion

Quantus Coupled vs Decoupled Parasitic Extraction Results

Category: Custom IC Design

By Aida

$usertype
•
updated over 1 year ago by Aida

2 replies • 3936 views
Discussion

Does anyone know where I can find info on the TSMC18rf (180nm) PDK?

Category: Custom IC Design

By TheCoffeeLovingStudent

$usertype
•
updated over 1 year ago by TheCoffeeLovingStudent

4 replies • 5226 views
Discussion

Current mirror sizing limited trans. length

Category: Custom IC Design

By JeyJey

$usertype
•
started over 1 year ago

0 replies • 2681 views
Discussion

Saving maestro Changes After Opening in Read-Only Mode

Category: Custom IC Design

By KTBuckON

$usertype
•
updated over 1 year ago by KTBuckON

2 replies • 3015 views
Discussion

Importing PSPICE .lib file into Virtuoso

Category: Custom IC Design

By IP202410071719

$usertype
•
updated over 1 year ago by IP202410071719

2 replies • 4314 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.