Custom IC Design

Latest Posts

Discussion

How to backannotate Monte-Carlo DCOP simulation results to schematic

Category: Custom IC Design

By delgsy
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updated over 3 years ago by delgsy

2 replies • 9659 views
Discussion

Statistical file for Monte Carlo analysis

Category: Custom IC Design

By Hemaresearch
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updated over 3 years ago by Andrew Beckett

3 replies • 11163 views
Discussion

Spectre 16775 Warning

Category: Custom IC Design

By DeepaMohan
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updated over 3 years ago by DeepaMohan

4 replies • 9871 views
Discussion

Is it possible to do this in VerilogA?

Category: Custom IC Design

By Svilen64
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updated over 3 years ago by Svilen64

11 replies • 12885 views
Discussion

Issue in accessing PSF directory with ocean script.

Category: Custom IC Design

By dskang
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updated over 3 years ago by FormerMember

2 replies • 10284 views
Discussion

Violations display in ADE L

Category: Custom IC Design

By FabioDiFazio
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updated over 3 years ago by FabioDiFazio

2 replies • 10314 views
Discussion

bandwidth function in Virtuoso calculator

Category: Custom IC Design

By sidm
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updated over 3 years ago by sidm

2 replies • 16575 views
Discussion

Using existing maestro view

Category: Custom IC Design

By sidm
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updated over 3 years ago by sidm

4 replies • 11735 views
Discussion

OCEAN

Category: Custom IC Design

By IC clown
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updated over 3 years ago by Andrew Beckett

3 replies • 9676 views
Discussion

some questions about pz analysis

Category: Custom IC Design

By zuiying
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updated over 3 years ago by FormerMember

1 replies • 12688 views
Discussion

plotting Smith charts

Category: Custom IC Design

By dzakharian
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updated over 3 years ago by Andrew Beckett

15 replies • 25278 views
Discussion

How does the correlation constraint "cc" affect the correlation of mismatch parameters

Category: Custom IC Design

By Matthew CG
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updated over 3 years ago by Matthew CG

2 replies • 2087 views
Discussion

Models for components in sample lib

Category: Custom IC Design

By sidm
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updated over 3 years ago by sidm

6 replies • 11358 views
Discussion

Change default increment of deriv

Category: Custom IC Design

By Holz
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updated over 3 years ago by FormerMember

5 replies • 10310 views
Discussion

How can I import verilog-A (.va) file in the cadence virtuoso?

Category: Custom IC Design

By yysunj
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updated over 3 years ago by Andrew Beckett

1 replies • 10022 views

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