Custom IC Design

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Discussion

Issues in accuracy of clock generation in Verilog-AMS with white noise jitter

Category: Custom IC Design

By RFStuff
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updated over 4 years ago by RFStuff

10 replies • 16689 views
Discussion

How do I set transient strobeoutput to "all" in AMS simulation?

Category: Custom IC Design

By Nader Fathy
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updated over 4 years ago by Nader Fathy

2 replies • 1619 views
Discussion

How to plot the difference of simulation result from Monte carlo and standard simulation?

Category: Custom IC Design

By Martinsh
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updated over 4 years ago by Andrew Beckett

9 replies • 14393 views
Discussion

VIVA zoom horizontal/vertical

Category: Custom IC Design

By amacSS
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updated over 4 years ago by amacSS

2 replies • 1721 views
Discussion

Bad value "primary" for parameter - Characterising cells using Liberate

Category: Custom IC Design

By iamKarthikBK
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started over 4 years ago

0 replies • 1376 views
Discussion

import a Spice Model in a schematic

Category: Custom IC Design

By Friedrich
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updated over 4 years ago by Friedrich

3 replies • 22426 views
Discussion

Connecting PMOS body to VSS! in Layout XL

Category: Custom IC Design

By Demi
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updated over 4 years ago by Quek

1 replies • 19222 views
Discussion

"the following branches form a loop of rigid branches"

Category: Custom IC Design

By Jose Sarmento
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updated over 4 years ago by Jose Sarmento

2 replies • 3288 views
Discussion

VerilogA $limit with spectre

Category: Custom IC Design

By camilloS
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updated over 4 years ago by Andrew Beckett

1 replies • 10420 views
Discussion

Using variables with spectrumMeas

Category: Custom IC Design

By Rob Gregoire
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started over 4 years ago

0 replies • 9962 views
Discussion

Automatically Export Spectre AMS-Output-Data

Category: Custom IC Design

By FloPro
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updated over 4 years ago by FloPro

2 replies • 11116 views
Discussion

ddt() at a certain timestep in Verilog-A

Category: Custom IC Design

By rhanna
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updated over 4 years ago by Andrew Beckett

11 replies • 15993 views
Discussion

Layout XL generating MOS without source contacts.

Category: Custom IC Design

By hesaliveJim
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updated over 4 years ago by henker

2 replies • 11652 views
Discussion

Is there a way to exclude vias when highlighting nets using Net Tracer on Virtuoso?

Category: Custom IC Design

By Tom Sawyer
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started over 4 years ago

0 replies • 9962 views
Discussion

can analog pad be used as power pad (power is ac sinosuid)

Category: Custom IC Design

By Her1
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updated over 4 years ago by Her1

6 replies • 11711 views

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