Custom IC Design

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Instance terminal mapping within IC5.10.41.500.x.x running on RHEl6.9

Category: Custom IC Design

By PBWU

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updated over 5 years ago by PBWU

4 replies • 14427 views
Discussion

Pnoise vs Transient noise

Category: Custom IC Design

By Haoyi219

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updated over 5 years ago by Haoyi219

2 replies • 19486 views
Discussion

Pass veriloga parameter to parameters in ADE XL

Category: Custom IC Design

By JakobToft

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updated over 5 years ago by JakobToft

4 replies • 19061 views
Discussion

How to measure the performance of a PLL ?

Category: Custom IC Design

By JJJin

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started over 5 years ago

0 replies • 13808 views
Discussion

Dynamic temperature variation of a SPECIFIC component during transient simulation

Category: Custom IC Design

By Quantum7

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updated over 5 years ago by Andrew Beckett

3 replies • 16452 views
Discussion

Using DFT to analyze a time-interleaving track and hold circuit

Category: Custom IC Design

By YutaoLiu

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updated over 5 years ago by Andrew Beckett

1 replies • 14737 views
Discussion

How do make the clock 25% duty cycle with jitter capability

Category: Custom IC Design

By cADEUser

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updated over 5 years ago by Andrew Beckett

4 replies • 17725 views
Discussion

How to generate a clock signal with random noise in Cadence Spectre?

Category: Custom IC Design

By BackerShu

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updated over 5 years ago by Andrew Beckett

3 replies • 30269 views
Discussion

Method to scale up or down lots of resistor/capacitor value together

Category: Custom IC Design

By FormerMember

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updated over 5 years ago by henker

1 replies • 2415 views
Discussion

Mixed-signal CDL netlist export

Category: Custom IC Design

By Nicolas Callens

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updated over 5 years ago by Andrew Beckett

1 replies • 15837 views
Discussion

LDO design and simulation

Category: Custom IC Design

By SHATADAL IIITG

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started over 5 years ago

0 replies • 14435 views
Discussion

Smooth dynamic parameter variation in transient sim

Category: Custom IC Design

By Quantum7

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updated over 5 years ago by Andrew Beckett

1 replies • 15666 views
Discussion

Plotting temperature in a transient simulation

Category: Custom IC Design

By Quantum7

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updated over 5 years ago by Quantum7

9 replies • 21578 views
Discussion

Pin placement does not show up

Category: Custom IC Design

By Nicolas Callens

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updated over 5 years ago by Andrew Beckett

1 replies • 14574 views
Discussion

How to fix "*WARNING* file /home/Kaveri/CDS.log Malformed Lock-Stake file.", when running virtuoso?

Category: Custom IC Design

By Marben

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updated over 5 years ago by Marben

2 replies • 9822 views

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