Digital Implementation

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Discussion

Using the generic PDK with Genus

Category: Digital Implementation

By peck
•
started over 2 years ago

0 replies • 6164 views
Discussion

*** CRASHED *** [signal 11] Segmentation fault (core dumped) invoking tempus

Category: Digital Implementation

By Neubee
•
started over 2 years ago

0 replies • 5564 views
Discussion

Large difference between post-route and signoff timing despite up-to-date RC scaling factors

Category: Digital Implementation

By Domi Hammerfall
•
updated over 2 years ago by Domi Hammerfall

2 replies • 7877 views
Discussion

Xtensa TIE documentation

Category: Digital Implementation

By ciapata
•
started over 2 years ago

0 replies • 6037 views
Discussion

No buffers added in power domain, hold violation

Category: Digital Implementation

By Krippkrupp
•
updated over 2 years ago by Krippkrupp

3 replies • 7218 views
Discussion

Cadence Modus generated test pattens

Category: Digital Implementation

By hpriya
•
started over 2 years ago

0 replies • 5720 views
Discussion

could not find lookup table definition

Category: Digital Implementation

By Rameen
•
started over 2 years ago

0 replies • 5336 views
Discussion

Voltus: How to validate which qrc techfile is used during tool top-level power grid extraction

Category: Digital Implementation

By Hieu Hoang
•
started over 2 years ago

0 replies • 5547 views
Discussion

Voltus: WARNING IMPEXT-2773

Category: Digital Implementation

By Hieu Hoang
•
started over 2 years ago

0 replies • 5365 views
Discussion

Spare cells are outside their region/fence

Category: Digital Implementation

By Domi Hammerfall
•
started over 2 years ago

0 replies • 909 views
Discussion

Instance grid not aligned to core sites due to automatic changes on the floorplan made by Innovus

Category: Digital Implementation

By Domi Hammerfall
•
started over 2 years ago

0 replies • 6337 views
Discussion

xt-ld.exe cannot find CMSIS DSP library

Category: Digital Implementation

By aravindt
•
updated over 2 years ago by vsydoruk

5 replies • 8008 views
Discussion

Convergence issue while simulating CNTFET adder

Category: Digital Implementation

By Aalelai
•
updated over 2 years ago by Aalelai

2 replies • 6673 views
Discussion

How to prevent sroute from placing vias where there already are some?

Category: Digital Implementation

By Domi Hammerfall
•
updated over 2 years ago by Domi Hammerfall

2 replies • 6559 views
Discussion

Are the -add and -master_clock constraints needed in an MMMC setup?

Category: Digital Implementation

By Domi Hammerfall
•
updated over 2 years ago by DimoM

3 replies • 2011 views

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