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Digital Implementation

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  • Discussion

    How can I go from gds to RC using Cadence QRC tool?

    Category: Digital Implementation

    By jpvSoccer

    •

    started over 15 years ago

    0 replies • 14332 views
  • Discussion

    Gated flop count

    Category: Digital Implementation

    By kazad

    •

    updated over 15 years ago by kazad

    6 replies • 17385 views
  • Discussion

    Comparing rho values in ict file with Design Rule Manual

    Category: Digital Implementation

    By Rajesh Vembu

    •

    started over 15 years ago

    0 replies • 14675 views
  • Discussion

    cascade buffers on DontTouch nets during CTS

    Category: Digital Implementation

    By Rajesh Vembu

    •

    updated over 15 years ago by Kari

    3 replies • 15313 views
  • Discussion

    Scan Reorder issue

    Category: Digital Implementation

    By Vishnu Chada

    •

    updated over 15 years ago by Vishnu Chada

    3 replies • 19623 views
  • Discussion

    Finding the leaf clock nets in the design

    Category: Digital Implementation

    By ssuhas

    •

    updated over 15 years ago by Vishnu Chada

    4 replies • 17370 views
  • Discussion

    How to report list of flops whose clock port is driven by test clock in test mode

    Category: Digital Implementation

    By diablo

    •

    updated over 15 years ago by diablo

    8 replies • 22361 views
  • Discussion

    Do Foundation Flows also exist for EPS or ETS?

    Category: Digital Implementation

    By pdgeek

    •

    updated over 15 years ago by Kari

    2 replies • 14979 views
  • Discussion

    To avoid overlap of metals in different layers

    Category: Digital Implementation

    By surajece01

    •

    updated over 15 years ago by Kari

    5 replies • 16477 views
  • Discussion

    EDI sdc read in error.

    Category: Digital Implementation

    By coffeelox

    •

    updated over 15 years ago by coffeelox

    1 replies • 15331 views
  • Discussion

    checkSysConf on CentOS

    Category: Digital Implementation

    By cdnjr

    •

    updated over 15 years ago by Kari

    1 replies • 15165 views
  • Discussion

    Final Insertion Delay of The Tile

    Category: Digital Implementation

    By bharat kurra

    •

    updated over 15 years ago by Kari

    3 replies • 15099 views
  • Discussion

    Max Insertion delay

    Category: Digital Implementation

    By bharat kurra

    •

    updated over 15 years ago by Kari

    1 replies • 14713 views
  • Discussion

    ETS 7.1 Power analysis

    Category: Digital Implementation

    By NigH

    •

    updated over 15 years ago by Kari

    1 replies • 14665 views
  • Discussion

    addFiller does not completely fill free area

    Category: Digital Implementation

    By kasyab

    •

    updated over 15 years ago by Kari

    9 replies • 19971 views
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