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  3. check if 2 signals are connected :

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check if 2 signals are connected :

archive
archive over 17 years ago

hello,

i'd like to check if 2 verilog signals are connected (of any kind - wire, reg , etc ...). 
the trivial case is when there's a direct dependency (like A = ~B ) and very easy to trace. 
but take a look at the following pseudo code: here you can notice that D in indirectly influenced by A. although it's easy to trace it in this example, there can be very large code blocks, with many distinguished modules, each written in different file... what make it much more difficult to trace  



clk = A and ~B
always (clk rise) 
   if (X==0)    
      D = C;
   else 
      D = 0; 
end




thanks !!!


Originally posted in cdnusers.org by zcabeli11
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  • archive
    archive over 17 years ago

    i see that my example wasn't recored, so i type it again to illustrate my problem:


    < code >
    A = B|C&D;

    always (posedge A)
    val <= 3'h0;

    < /code >

    in this example i'm seeking to find a simple method that check connectivity (for example between C and val).
    of course that i'm aiming toward much more complex modules which have many code lines, and the connection between
    2 end points may go through a lot of intermediators .



    Originally posted in cdnusers.org by zcabeli11
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  • archive
    archive over 17 years ago

    I suspect that you aren't getting an answer here because there is no tool that will do that kind of check for you automatically. At least I've never heard of one.

    You may need to write some kind of special-purpose VPI routine to traverse the design connectivity information to extract that kind of signal relationship.


    Originally posted in cdnusers.org by TAM
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  • archive
    archive over 17 years ago

    If you only need to do a few you can use Verdi from Novas to do this. They can create a "cone" from a point. You can use this to trace backwards to a Flop or PI and stop. You would write out this Verilog and then search for the Signal you are interested in seeing if it is in the fan in cone. If you want to go back through flops I believe this is possible but I have never done that. I suggest you get with a Novas AE and explore this future.


    Originally posted in cdnusers.org by bryan
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  • archive
    archive over 17 years ago

    I still can't quite understand what zcabeli11 wants to verify the connectivity of.
    Sure, one could trace point-to-point connectivity with a VPI app, with simulator TCL commands or the GUI, but then what verification does that do for you? Does it tell you if the design is correct?

    By the way, SimVision can show you the connection between two points. Open the Schematic Tracer window, select two nets that you want to see the connection for (hold Control key when clicking the 2nd net). Next select Trace Point-to-point from the menu.

    If you want to verify something more interesting about the connection then you should be using PSL or SVA to verify the behaviour of the connection between A and val (to quote the example from zcabeli11).
    But then of course you still have to specify the intended behaviour - if you just infer a check from the structure, then what are you verifying?


    Originally posted in cdnusers.org by stephenh
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