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Functional Verification

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  • Discussion

    Issue with merging coverage

    Category: Functional Verification

    By denniscwang

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    updated over 12 years ago by denniscwang

    1 replies • 15251 views
  • Discussion

    SOC connectivity check

    Category: Functional Verification

    By Buvna

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    •

    updated over 12 years ago by ckomar

    1 replies • 13963 views
  • Discussion

    Getting vhdl constants in system verilog

    Category: Functional Verification

    By rajay

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    •

    updated over 12 years ago by rajay

    2 replies • 15718 views
  • Discussion

    How to make eManager run in "parallel"

    Category: Functional Verification

    By Kobi Y

    $usertype

    •

    updated over 12 years ago by StephenH

    4 replies • 3339 views
  • Discussion

    uninitialized state elements

    Category: Functional Verification

    By BharathECE

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    •

    updated over 12 years ago by ckomar

    1 replies • 14247 views
  • Discussion

    Create/Import Verilog-AMS Cell View

    Category: Functional Verification

    By Bayes

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    •

    started over 12 years ago

    0 replies • 1134 views
  • Discussion

    DIVA LVS Problem After Installing Assura

    Category: Functional Verification

    By eame

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    •

    updated over 12 years ago by eame

    1 replies • 13760 views
  • Discussion

    run IFV Xcheck property

    Category: Functional Verification

    By BharathECE

    $usertype

    •

    updated over 12 years ago by TAM1

    1 replies • 13749 views
  • Discussion

    IFV Dead code check fail

    Category: Functional Verification

    By BharathECE

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    •

    updated over 12 years ago by ckomar

    1 replies • 13904 views
  • Discussion

    specman clock

    Category: Functional Verification

    By hellohi

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    •

    updated over 12 years ago by hellohi

    3 replies • 15002 views
  • Discussion

    FSM coverage (RTL from CtoS)

    Category: Functional Verification

    By GiuseppeDG

    $usertype

    •

    started over 12 years ago

    0 replies • 13824 views
  • Discussion

    Cadence lint HAL tool

    Category: Functional Verification

    By LINT

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    •

    started over 12 years ago

    0 replies • 16940 views
  • Discussion

    ATPG for RTL

    Category: Functional Verification

    By GiuseppeDG

    $usertype

    •

    started over 12 years ago

    0 replies • 13326 views
  • Discussion

    Warning in Toggle coverage exclusion

    Category: Functional Verification

    By nenu09

    $usertype

    •

    started over 12 years ago

    0 replies • 14397 views
  • Discussion

    UniPro eVC integration

    Category: Functional Verification

    By PeterSVerif

    $usertype

    •

    started over 12 years ago

    0 replies • 13411 views
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