Functional Verification

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Discussion

how to force the variables inside a class? i'm facing this error "FOAUTO"

Category: Functional Verification

By chetan somana

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updated over 1 year ago by chetan somana

6 replies • 4851 views
Discussion

Tagging uvm_errors in waveform file for post-processing

Category: Functional Verification

By antmarzam

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updated over 1 year ago by Doug Koslow

3 replies • 6531 views
Discussion

verification metrics on IMC

Category: Functional Verification

By Nir Z

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updated over 1 year ago by StephenH

8 replies • 10082 views
Discussion

$display() is executed immediately after simulation start although the condition in always statement (under which $display() resides) is not satisfied

Category: Functional Verification

By alexek

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updated over 2 years ago by alexek

1 replies • 5614 views
Discussion

simvision failed to load the svwf waveform file "Error: bad condition name "duty1_reg_19_0__signmag_19_0_15"

Category: Functional Verification

By wangyunxin

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started over 2 years ago

0 replies • 1593 views
Discussion

change text editor colors (not trace colors) used in Probe

Category: Functional Verification

By kspahr

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updated over 2 years ago by tpylant

1 replies • 5978 views
Discussion

How to invoke the Xcelium Design Browser from Command Line?

Category: Functional Verification

By amnldm

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updated over 2 years ago by StephenH

5 replies • 13342 views
Discussion

Stuck at a package not bound error in the accelerated UVM course

Category: Functional Verification

By arjunchak

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updated over 2 years ago by tpylant

1 replies • 8667 views
Discussion

When running upf simulation power net is stuck at 0

Category: Functional Verification

By 2tojohny

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updated over 2 years ago by richardcromwell

1 replies • 7248 views
Discussion

SimVision does not display a part of the signal plot

Category: Functional Verification

By WaliAshu

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updated over 2 years ago by Doug Koslow

3 replies • 8419 views
Discussion

fixed-point in simvision

Category: Functional Verification

By wangyunxin

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updated over 2 years ago by StephenH

4 replies • 8299 views
Discussion

SystemVerilog count the $error() output during simulation

Category: Functional Verification

By HoWei

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updated over 2 years ago by StephenH

1 replies • 9520 views
Discussion

preprocessor directive

Category: Functional Verification

By daivon

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updated over 2 years ago by StephenH

1 replies • 6018 views
Discussion

SIMVISION source browser- PPESNAP error

Category: Functional Verification

By sthoppa

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updated over 2 years ago by sthoppa

6 replies • 4297 views
Discussion

Permission issue on xceilum

Category: Functional Verification

By sanGup30

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updated over 2 years ago by StephenH

1 replies • 6842 views

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