• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Functional Verification
CDNS - double leaderboard script

Functional Verification

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    ICCR : How to generate functional cov report in .html format ,i get it in .data

    Category: Functional Verification

    By Pooja

    •

    updated over 17 years ago by Pooja

    3 replies • 17969 views
  • Discussion

    Hierachical comparisson issues in LEC

    Category: Functional Verification

    By Verplec

    •

    updated over 17 years ago by archive

    3 replies • 17259 views
  • Discussion

    Checking casting of an enumerated type

    Category: Functional Verification

    By MaurizioCDN

    •

    updated over 17 years ago by ThinkVer

    2 replies • 15143 views
  • Discussion

    Troubleshooting IFV

    Category: Functional Verification

    By JASK

    •

    updated over 17 years ago by JASK

    6 replies • 19550 views
  • Discussion

    NC Functional Coverage

    Category: Functional Verification

    By ceesam

    •

    started over 17 years ago

    0 replies • 14320 views
  • Discussion

    Generating an ICCR output report with cumulative coverage metrics

    Category: Functional Verification

    By danlarkin

    •

    updated over 17 years ago by Mickey

    1 replies • 15315 views
  • Discussion

    FSDB dump using IUS6.2-p1

    Category: Functional Verification

    By archive

    •

    updated over 17 years ago by adua

    2 replies • 18859 views
  • Discussion

    How to mirror VHDL signal in verilog Top Test bench

    Category: Functional Verification

    By Sowmya Reddy

    •

    updated over 17 years ago by adua

    4 replies • 23193 views
  • Discussion

    how to update e register model on top of PCIe

    Category: Functional Verification

    By twk1156

    •

    started over 17 years ago

    0 replies • 14238 views
  • Discussion

    ICC Functional Coverage User Guide

    Category: Functional Verification

    By ceesam

    •

    updated over 17 years ago by tpylant

    1 replies • 20898 views
  • Discussion

    IUS trasition coverage problem

    Category: Functional Verification

    By ceesam

    •

    updated over 17 years ago by tpylant

    5 replies • 16143 views
  • Discussion

    Viewing covergroups

    Category: Functional Verification

    By ceesam

    •

    updated over 17 years ago by tpylant

    6 replies • 21036 views
  • Discussion

    Design Ware in LEC

    Category: Functional Verification

    By megovind

    •

    started over 17 years ago

    0 replies • 14703 views
  • Discussion

    Not mapped points

    Category: Functional Verification

    By megovind

    •

    started over 17 years ago

    0 replies • 14344 views
  • Discussion

    CDC (Clock Domain Crosssing)

    Category: Functional Verification

    By kunal1514

    •

    updated over 17 years ago by ceesam

    1 replies • 16237 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information