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High-Level Synthesis

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  • Discussion

    Guidelines for the High-Level Synthesis Forum

    Category: High-Level Synthesis

    By dpursley dpursley

    •

    started over 10 years ago

    0 replies • 14344 views
  • Discussion

    To add asynch. reset at Stratus example-1

    Category: High-Level Synthesis

    By SC202501247228 SC202501247228

    •

    started 6 months ago

    0 replies • 1539 views
  • Discussion

    find cells in row next to all same

    Category: High-Level Synthesis

    By zehtr zehtr

    •

    started over 1 year ago

    0 replies • 4955 views
  • Discussion

    write placement blockage around cell

    Category: High-Level Synthesis

    By zehtr zehtr

    •

    started over 1 year ago

    0 replies • 5030 views
  • Discussion

    Delivered example STRATUS_20.24.100/share/stratus/collateral/examples/simple_dmac_apb is not able to work.

    Category: High-Level Synthesis

    By mxlusereight mxlusereight

    •

    started over 2 years ago

    0 replies • 1139 views
  • Discussion

    Innovus

    Category: High-Level Synthesis

    By polot12 polot12

    •

    started over 2 years ago

    0 replies • 6472 views
  • Discussion

    How to generate Verilog Library with verilog submodules in Stratus?

    Category: High-Level Synthesis

    By Saya Lee Saya Lee

    •

    started over 2 years ago

    0 replies • 8194 views
  • Discussion

    How to launch Stratus GUI

    Category: High-Level Synthesis

    By gdnagendra gdnagendra

    •

    started over 3 years ago

    0 replies • 11189 views
  • Discussion

    Keep tie cells connection

    Category: High-Level Synthesis

    By zxw109 zxw109

    •

    started over 3 years ago

    0 replies • 10941 views
  • Discussion

    Syhthesizing bluespec verilog (.bsv) code with Cadence Genus

    Category: High-Level Synthesis

    By iamKarthikBK iamKarthikBK

    •

    started over 4 years ago

    0 replies • 11146 views
  • Discussion

    Why does Stratus HLS report this error?

    Category: High-Level Synthesis

    By idwwwoqq808 idwwwoqq808

    •

    updated over 4 years ago by Rosemary

    2 replies • 17431 views
  • Discussion

    Cadence genus Initialisation

    Category: High-Level Synthesis

    By rez101998 rez101998

    •

    started over 4 years ago

    0 replies • 12264 views
  • Discussion

    convert .lib library file to .db file

    Category: High-Level Synthesis

    By HaolinCong HaolinCong

    •

    started over 4 years ago

    0 replies • 13537 views
  • Discussion

    How to change font size for help/menus ?

    Category: High-Level Synthesis

    By pmuld0x pmuld0x

    •

    started over 4 years ago

    0 replies • 3053 views
  • Discussion

    How to get full module names in report_area command

    Category: High-Level Synthesis

    By SrikanthReddy SrikanthReddy

    •

    started over 4 years ago

    0 replies • 14107 views
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