How to read output of a 32bit bus in a transient simulation using Spectre ?

Dear Mehrdad,

I tried an example using the SKILL routine described at the On-line support article at URL:

https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000nW2AEAU&pageName=ArticleContent

and assembled a set of screenshots that might help you. See what you think...

Shawn

The file is attached below:

create_digital_busses_from_analog_waveforms_sml_032922vp0.pdf

Thanks Shawn,

I will give it a try and let you know.

I hoped that when in the vector file we define output signals ( like when we put o in io line) .. It actually records the output buses and signal values in a file.

Dear Mdad,

Mdad said:

I hoped that when in the vector file we define output signals ( like when we put o in io line) .. It actually records the output buses and signal values in a file.

I m afraid, I'm not quite understanding what you mean by this statement - sorry!  I tried to show that the waveform can be exported to a file in (x,y) format with x being time and y being its digital representation in the file I attached. I've made a quick screen recording bit it appears its size prevents me from uploading it. Hence, I placed a shared link of it as shown below

Shawn

www.dropbox.com/.../digital_bus_exported_to_csv_file_sml_033022r.mp4

Thanks Shawn,

I also could use the analog to digital function under measurement to create the same bus and saved it to file.

What I meant in my post was that in vector file we define input, bidirectional and output signals.  I donot know what is the purpose of defining output signal in vector file, since I donot see any effect of that during simulation. I thought maybe it saves the output signals that are defined in vector file somewhere, but I couldnot find anything.

Thanks again,

-Mehrdad

Mehrdad,

Output vectors are used in some flows (I think in Ultrasim; not sure off the top of my head with Spectre) for it to check that the output signal in the circuit matches the vector file to determine the correctness of the simulation results. So input signals generate signals, and output signals check the circuit against the expected output. It is not used to generate an output file though...

Andrew

Dear Mdad,

Mdad said:

I donot know what is the purpose of defining output signal in vector file, since I donot see any effect of that during simulation

Oops - just see that Andrew beat me to a response!!! His answer is, of course, correct! To add to his response, if I may, the Rapid Adoption Kit (RAK) for the use of VEC and VCD files in the spectre environment (totally analog simulator), the output vector data is use (optionally) for a comparison of the expected output (from the VEC file) with the actual analog signal output. This is detailed for Explorer on page 32 of the April 2019 RAK at URL:

support.cadence.com/.../articleattachmentportal

The difference between the expected and actual values are provided in a file "" within the simulation netlist directory.

I hope this adds a bit to Andrew's comments!!

Shawn

Dear Mdad,

I accidentally forgot to include the file name in the netlist directory with the differences (i.e., mismatches) between the expected and analog outputs. The file name is "input_tran_vecerr".

Shawn

Dear Mdad,

Mdad said:

I also could use the analog to digital function under measurement to create the same bus and saved it to file.

I think using the analog to digital function will provide the output in a format you may be expecting. While it converts each signal in the analog bus to its digital representation, if you export the now digital signals you will find the resulting file has a"time" and "value" column for each individual bit of the bus. Hence, the MSB may only have a few entries (i.e., rows), while the LSB will have a lot of rows (since, in general, presumably the LSB changes more than the MSB). 

If you use the SKILL function I proposed, as shown in the Adobe file I attached and show in the link to the short video I sent in my prior post, it will produce an exported file with only a single time column and a single value column - the latter with the state of each bit.

Shawn

Dear Shawn and Andrew,

Thanks for your replies. It makes sense now.

Mehrdad