simulating node capacitance charging

You could use the captab capability to report the instantaneous capacitance operating point info at the the times in question. The easiest way to do this is first to enable a dc analysis with the captab settings (strictly speaking it's not the DC analysis, but an info analysis, and so you could potentially use a row in the Save circuit information analysis table to add a new captab output - but for now I'll just showing doing it from dc). This is on the DC options form:

Then on the transient options form, enable infotimes to be the times you want to output the capacitance info - and give the name of the captab info analysis (the name is generated automatically by checking the captab on the DC options above - the name I've given here is the name that appears in the netlist):

Then after running the simulations, under Results->Print->Capacitance Table you'll get this - with a cyclic field at the top to pick the time you wish to look at:

Regards,

Andrew.

You could use the captab capability to report the instantaneous capacitance operating point info at the the times in question. The easiest way to do this is first to enable a dc analysis with the captab settings (strictly speaking it's not the DC analysis, but an info analysis, and so you could potentially use a row in the Save circuit information analysis table to add a new captab output - but for now I'll just showing doing it from dc). This is on the DC options form:

Then on the transient options form, enable infotimes to be the times you want to output the capacitance info - and give the name of the captab info analysis (the name is generated automatically by checking the captab on the DC options above - the name I've given here is the name that appears in the netlist):

Then after running the simulations, under Results->Print->Capacitance Table you'll get this - with a cyclic field at the top to pick the time you wish to look at:

Regards,

Andrew.

Hi Yefj,

yefJ said:

 When TG closes, it charge Q till the end although its not suppose to charge at all at this step(closed TG) ,as shown  in the last plot bellow.

I  added some labels to better explain my comment.

If I understand your comment, and TG is the top most transmission gate, it appears TG1 (the bottom most transmission gate) operates on the complementary clock version of clk/clk_not. Hence, when TG assumes its high-impedance state, TG1 assumes its low impedance state and the charge on node Q serves to charge up your unlabeled gate node Q2. Hence, between the charge that flows to Q2 and the charge injection of opening and closing TG and TG1, it is expected that the node voltage of node Q will change.

Does this make sense Yefj? You can minimize the change by added a signficant capacitor to node Q.

Shawn

Hello Andrew,so at a certain time it shows me the capacitance.

I found the CAPTAB in Transient->options so its time domain .

Maybe AC CAPTAB is better ? because capacitance at DC is open circuit.

How can i do CAPTAB at AC?

Thanks 

Thanks 

Andrew Beckett said:

but for now I'll just showing doing it from dc

Hello Shawn, i think to isolate the focus at Pass gate.

is there an article  with Cadence virtuoso implementation where i cant see how to plan a TG that will get threw my data  when the clock rises?

Thanks

yefJ said:

is there an article  with Cadence virtuoso implementation where i cant see how to plan a TG that will get threw my data  when the clock rises?

If I understand your initial objective, which you stated as "i am trying to build an RF frequency D FlipFlop as shown bellow", I think there is an error in your schematic diagram. I have modified your diagram and included it below to illustrate what I think you need to simulate. When your input TG is low impedance, TG1 is high impedance and node Q will charge to the D input voltage and the output of the inverter with input Q will be QN. When input TG becomes high impedance, TG1 will become low impedance and it will allow the feedback inverter to force node Q to the voltage it had when TG was low impedance.

Does this make more sense now yefj?

These questions are rather hard work - you really need to speak to a supervisor or get some training. A few basics (OK, they're not all basics but the questions about DC and AC are):

1. A DC analysis is used to perform the operating point of the circuit (well, unless you are doing a sweep). The operating point is the set of node voltages and currents where the circuit has settled to a steady DC value.
2. From that DC operating point, the small-signal model parameters (e.g. gm, gds, vds, vth and importantly the device capacitances can be computed.
3. If you were to then run an AC analysis, it would use that small signal model and use the capacitances at that particular operating point to compute the frequency response of the circuit (together with the passive components in the circuit). Nothing is time-varying when you do this.
4. If you save the captab (which is an "info" analysis - see "spectre -h info" for more details on what is saveable from an info analysis), it outputs the total capacitance on each node, or node to node capacitance - formed of the capacitance info from the operating point as well as the actual capacitors in the circuit.
5. Info analyses can also save other data (such as model parameters, operating point parameters, instance parameters) - much of this is used to provide the data to allow annotation of data onto the schematic
6. The captab is typically set up from the DC analysis for convenience - but really it's just adding an info analysis (could be done via the Outputs->Save All form where the other info analyses are). When it's done from the DC, if the DC analysis is performed, the info analysis to write the captab happens too.
7. I'd forgotten there's also captab on the tran options form. That's even easier because you can check the "timed" box, and then you don't need to enter the name of the info analysis but just the times in the info times field - then it will effectively do the same as I described above - it saves the capacitance information at the operating points at specific times during the transient.
8. There's no such thing as an AC captab, because the captab are the capacitances at a fixed DC operating point; the AC does indeed compute a DC operating point at the beginning (if not preceded by a DC analysis), but there would be nothing special about having a captab associated with the AC - it might just as well be related to the DC analysis.
9. The fact that capacitances are open circuit at DC is irrelevant - this is not computing the impedance at DC, but the capacitance at an operating point, such that if a small AC signal was applied around that operating point, it would be filtered by a circuit containing that capacitance.

Regards,

Andrew.

Thank you very much.

i will try dissamble this circuit into smaller subcircuits and use captab at every point.