• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design

PCB Design

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

PCB Design

Latest Posts

  • Create a new Post
  • Discussion

    Frustration in getting bugs fixed

    Category: PCB Design

    By Lennie

    $usertype

    •

    started over 6 years ago

    0 replies • 12450 views
  • Discussion

    Regarding importing and eding of Eagle PCB boards to Allegro PCB Designer 17.2 linux version?

    Category: PCB Design

    By VijayKK

    $usertype

    •

    updated over 6 years ago by steve

    15 replies • 20238 views
  • Discussion

    Footprint

    Category: PCB Design

    By madboss

    $usertype

    •

    updated over 6 years ago by CadAce2K

    2 replies • 13247 views
  • Discussion

    OrCAD Capture 17.2 Start Screen

    Category: PCB Design

    By MrSpock

    $usertype

    •

    updated over 6 years ago by redwire

    1 replies • 15439 views
  • Discussion

    OrCAD User Assigned Reference Unset

    Category: PCB Design

    By MrSpock

    $usertype

    •

    updated over 6 years ago by MrSpock

    2 replies • 15236 views
  • Discussion

    Write protect a Cadence Capture project

    Category: PCB Design

    By Magnetcore

    $usertype

    •

    updated over 6 years ago by Magnetcore

    2 replies • 13228 views
  • Discussion

    DRC error: route keepout spacing

    Category: PCB Design

    By masamasa

    $usertype

    •

    updated over 6 years ago by masamasa

    2 replies • 16339 views
  • Discussion

    How to take over a design from an outsource

    Category: PCB Design

    By EvanatBDS

    $usertype

    •

    updated over 6 years ago by EvanatBDS

    7 replies • 15026 views
  • Discussion

    Capture CIS ORCIS-6182 I am not sure what this means

    Category: PCB Design

    By Ksquared

    $usertype

    •

    updated over 6 years ago by jatins

    11 replies • 30148 views
  • Discussion

    net assignment question

    Category: PCB Design

    By masamasa

    $usertype

    •

    updated over 6 years ago by masamasa

    5 replies • 14276 views
  • Discussion

    Error: Table name not found in dbc (CIP)

    Category: PCB Design

    By jatins

    $usertype

    •

    updated over 6 years ago by RFinley

    2 replies • 14262 views
  • Discussion

    Custom reports - how do I get a list of net pins

    Category: PCB Design

    By Lennie

    $usertype

    •

    updated over 6 years ago by oldmouldy

    1 replies • 1621 views
  • Discussion

    Orcad capture 16.5 PCB Foot print

    Category: PCB Design

    By shavai

    $usertype

    •

    updated over 6 years ago by oldmouldy

    1 replies • 13010 views
  • Discussion

    Orcad capture 16.5 - warning, part name during netlist generation.

    Category: PCB Design

    By shavai

    $usertype

    •

    updated over 6 years ago by shavai

    2 replies • 2308 views
  • Discussion

    A GenCAM from Allegro

    Category: PCB Design

    By archive

    $usertype

    •

    updated over 6 years ago by Ejlersen

    33 replies • 27309 views
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information